34 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_have_3d()  local
41 	fifo_min = ioread32(fifo_mem  + SVGA_FIFO_MIN);  in vmw_fifo_have_3d()
45 	hwversion = ioread32(fifo_mem +  in vmw_fifo_have_3d()
66 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_have_pitchlock()  local
72 	caps = ioread32(fifo_mem + SVGA_FIFO_CAPABILITIES);  in vmw_fifo_have_pitchlock()
81 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_init()  local
120 	iowrite32(min, fifo_mem + SVGA_FIFO_MIN);  in vmw_fifo_init()
121 	iowrite32(dev_priv->mmio_size, fifo_mem + SVGA_FIFO_MAX);  in vmw_fifo_init()
123 	iowrite32(min,  fifo_mem + SVGA_FIFO_NEXT_CMD);  in vmw_fifo_init()
124 	iowrite32(min,  fifo_mem + SVGA_FIFO_STOP);  in vmw_fifo_init()
125 	iowrite32(0, fifo_mem + SVGA_FIFO_BUSY);  in vmw_fifo_init()
131 	max = ioread32(fifo_mem + SVGA_FIFO_MAX);  in vmw_fifo_init()
132 	min = ioread32(fifo_mem  + SVGA_FIFO_MIN);  in vmw_fifo_init()
133 	fifo->capabilities = ioread32(fifo_mem + SVGA_FIFO_CAPABILITIES);  in vmw_fifo_init()
141 	iowrite32(dev_priv->last_read_seqno, fifo_mem + SVGA_FIFO_FENCE);  in vmw_fifo_init()
148 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_ping_host()  local
152 	if (unlikely(ioread32(fifo_mem + SVGA_FIFO_BUSY) == 0)) {  in vmw_fifo_ping_host()
153 		iowrite32(1, fifo_mem + SVGA_FIFO_BUSY);  in vmw_fifo_ping_host()
162 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_release()  local
169 	dev_priv->last_read_seqno = ioread32(fifo_mem + SVGA_FIFO_FENCE);  in vmw_fifo_release()
194 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_is_full()  local
195 	uint32_t max = ioread32(fifo_mem + SVGA_FIFO_MAX);  in vmw_fifo_is_full()
196 	uint32_t next_cmd = ioread32(fifo_mem + SVGA_FIFO_NEXT_CMD);  in vmw_fifo_is_full()
197 	uint32_t min = ioread32(fifo_mem + SVGA_FIFO_MIN);  in vmw_fifo_is_full()
198 	uint32_t stop = ioread32(fifo_mem + SVGA_FIFO_STOP);  in vmw_fifo_is_full()
301 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_reserve()  local
309 	max = ioread32(fifo_mem + SVGA_FIFO_MAX);  in vmw_fifo_reserve()
310 	min = ioread32(fifo_mem + SVGA_FIFO_MIN);  in vmw_fifo_reserve()
311 	next_cmd = ioread32(fifo_mem + SVGA_FIFO_NEXT_CMD);  in vmw_fifo_reserve()
322 		uint32_t stop = ioread32(fifo_mem + SVGA_FIFO_STOP);  in vmw_fifo_reserve()
356 					iowrite32(bytes, fifo_mem +  in vmw_fifo_reserve()
358 				return fifo_mem + (next_cmd >> 2);  in vmw_fifo_reserve()
381 			      __le32 __iomem *fifo_mem,  in vmw_fifo_res_copy()  argument
393 	iowrite32(bytes, fifo_mem + SVGA_FIFO_RESERVED);  in vmw_fifo_res_copy()
395 	memcpy_toio(fifo_mem + (next_cmd >> 2), buffer, chunk_size);  in vmw_fifo_res_copy()
398 		memcpy_toio(fifo_mem + (min >> 2), buffer + (chunk_size >> 2),  in vmw_fifo_res_copy()
403 			       __le32 __iomem *fifo_mem,  in vmw_fifo_slow_copy()  argument
411 		iowrite32(*buffer++, fifo_mem + (next_cmd >> 2));  in vmw_fifo_slow_copy()
416 		iowrite32(next_cmd, fifo_mem + SVGA_FIFO_NEXT_CMD);  in vmw_fifo_slow_copy()
425 	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;  in vmw_fifo_commit()  local
426 	uint32_t next_cmd = ioread32(fifo_mem + SVGA_FIFO_NEXT_CMD);  in vmw_fifo_commit()
427 	uint32_t max = ioread32(fifo_mem + SVGA_FIFO_MAX);  in vmw_fifo_commit()
428 	uint32_t min = ioread32(fifo_mem + SVGA_FIFO_MIN);  in vmw_fifo_commit()
438 			vmw_fifo_res_copy(fifo_state, fifo_mem,  in vmw_fifo_commit()
441 			vmw_fifo_slow_copy(fifo_state, fifo_mem,  in vmw_fifo_commit()
457 		iowrite32(next_cmd, fifo_mem + SVGA_FIFO_NEXT_CMD);  in vmw_fifo_commit()
461 		iowrite32(0, fifo_mem + SVGA_FIFO_RESERVED);  in vmw_fifo_commit()