Lines Matching refs:ctlreg
345 dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND | in r852_cmdctl()
349 dev->ctlreg |= R852_CTL_DATA; in r852_cmdctl()
352 dev->ctlreg |= R852_CTL_COMMAND; in r852_cmdctl()
355 dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON); in r852_cmdctl()
357 dev->ctlreg &= ~R852_CTL_WRITE; in r852_cmdctl()
361 dev->ctlreg |= R852_CTL_WRITE; in r852_cmdctl()
363 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_cmdctl()
368 if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) { in r852_cmdctl()
369 dev->ctlreg |= R852_CTL_WRITE; in r852_cmdctl()
370 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_cmdctl()
432 dev->ctlreg |= R852_CTL_ECC_ENABLE; in r852_ecc_hwctl()
436 dev->ctlreg | R852_CTL_ECC_ACCESS); in r852_ecc_hwctl()
439 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_ecc_hwctl()
444 dev->ctlreg &= ~R852_CTL_ECC_ENABLE; in r852_ecc_hwctl()
445 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_ecc_hwctl()
463 dev->ctlreg &= ~R852_CTL_ECC_ENABLE; in r852_ecc_calculate()
464 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); in r852_ecc_calculate()
477 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_ecc_calculate()
502 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); in r852_ecc_correct()
504 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_ecc_correct()
1035 if (dev->ctlreg & R852_CTL_CARDENABLE) in r852_suspend()