201 	u32 link = READ_REG(priv, regMAC_LNK_STAT) & MAC_LINK_STAT;  in bdx_link_changed()
257 	isr = (READ_REG(priv, regISR) & IR_RUN);  in bdx_isr_napi()
279 			READ_REG(priv, regTXF_WPTR_0);  in bdx_isr_napi()
280 			READ_REG(priv, regRXD_WPTR_0);  in bdx_isr_napi()
325 	master = READ_REG(priv, regINIT_SEMAPHORE);  in bdx_fw_load()
326 	if (!READ_REG(priv, regINIT_STATUS) && master) {  in bdx_fw_load()
334 		if (READ_REG(priv, regINIT_STATUS)) {  in bdx_fw_load()
351 			    READ_REG(priv, regVPC),  in bdx_fw_load()
352 			    READ_REG(priv, regVIC),  in bdx_fw_load()
353 			    READ_REG(priv, regINIT_STATUS), i);  in bdx_fw_load()
367 	    READ_REG(priv, regUNC_MAC0_A),  in bdx_restore_mac()
368 	    READ_REG(priv, regUNC_MAC1_A), READ_REG(priv, regUNC_MAC2_A));  in bdx_restore_mac()
378 	    READ_REG(priv, regUNC_MAC0_A),  in bdx_restore_mac()
379 	    READ_REG(priv, regUNC_MAC1_A), READ_REG(priv, regUNC_MAC2_A));  in bdx_restore_mac()
478 		val = READ_REG(priv, regCLKPLL);  in bdx_hw_reset()
481 		val = READ_REG(priv, regCLKPLL);  in bdx_hw_reset()
486 		if ((READ_REG(priv, regCLKPLL) & CLKPLL_LKD) == CLKPLL_LKD) {  in bdx_hw_reset()
488 			READ_REG(priv, regRXD_CFG0_0);  in bdx_hw_reset()
510 		if (READ_REG(priv, regRST_PORT) & 1)  in bdx_sw_reset()
521 	READ_REG(priv, regISR);  in bdx_sw_reset()
529 		DBG("%x = %x\n", i, READ_REG(priv, i) & TXF_WPTR_WR_PTR);  in bdx_sw_reset()
544 		DBG("%x = %x\n", i, READ_REG(priv, i) & TXF_WPTR_WR_PTR);  in bdx_sw_reset()
663 		data[2] = READ_REG(priv, data[1]);  in bdx_ioctl_priv()
714 	val = READ_REG(priv, reg);  in __bdx_vlan_rx_vid()
819 			val = READ_REG(priv, reg);  in bdx_setmulti()
854 	macAddress[2] = READ_REG(priv, regUNC_MAC0_A);  in bdx_read_mac()
855 	macAddress[2] = READ_REG(priv, regUNC_MAC0_A);  in bdx_read_mac()
856 	macAddress[1] = READ_REG(priv, regUNC_MAC1_A);  in bdx_read_mac()
857 	macAddress[1] = READ_REG(priv, regUNC_MAC1_A);  in bdx_read_mac()
858 	macAddress[0] = READ_REG(priv, regUNC_MAC2_A);  in bdx_read_mac()
859 	macAddress[0] = READ_REG(priv, regUNC_MAC2_A);  in bdx_read_mac()
871 	val = READ_REG(priv, reg);  in bdx_read_l2stat()
872 	val |= ((u64) READ_REG(priv, reg + 8)) << 32;  in bdx_read_l2stat()
1212 	f->m.wptr = READ_REG(priv, f->m.reg_WPTR) & TXF_WPTR_WR_PTR;  in bdx_rx_receive()
1575 	f->m.rptr = READ_REG(priv, f->m.reg_RPTR) & TXF_WPTR_WR_PTR;  in bdx_tx_space()
1714 	f->m.wptr = READ_REG(priv, f->m.reg_WPTR) & TXF_WPTR_MASK;  in bdx_tx_cleanup()