Lines Matching refs:uint32

43 	uint32	cccaps;			/* chip common capabilities */
44 	uint32  cccaps_ext;			/* chip common capabilities extension */
46 	uint32	pmucaps;		/* pmu capabilities */
55 	uint32	chipst;			/* chip status */
127 typedef void (*gpio_handler_t)(uint32 stat, void *arg);
173 extern uint si_wrapperreg(si_t *sih, uint32 offset, uint32 mask, uint32 val);
174 extern uint si_core_wrapperreg(si_t *sih, uint32 coreidx, uint32 offset, uint32 mask, uint32 val);
176 extern uint32 si_core_cflags(si_t *sih, uint32 mask, uint32 val);
177 extern void si_core_cflags_wo(si_t *sih, uint32 mask, uint32 val);
178 extern uint32 si_core_sflags(si_t *sih, uint32 mask, uint32 val);
186 extern uint32 si_addrspace(si_t *sih, uint asidx);
187 extern uint32 si_addrspacesize(si_t *sih, uint asidx);
188 extern void si_coreaddrspaceX(si_t *sih, uint asidx, uint32 *addr, uint32 *size);
190 extern void si_core_reset(si_t *sih, uint32 bits, uint32 resetbits);
191 extern void si_core_disable(si_t *sih, uint32 bits);
192 extern uint32 si_clock_rate(uint32 pll_type, uint32 n, uint32 m);
195 extern uint32 si_clock(si_t *sih);
196 extern uint32 si_alp_clock(si_t *sih);
197 extern uint32 si_ilp_clock(si_t *sih);
209 extern uint32 si_gpiotimerval(si_t *sih, uint32 mask, uint32 val);
212 extern uint32 si_socram_size(si_t *sih);
213 extern uint32 si_socdevram_size(si_t *sih);
214 extern uint32 si_socram_srmem_size(si_t *sih);
218 extern uint32 si_socdevram_remap_size(si_t *sih);
221 extern void si_watchdog_ms(si_t *sih, uint32 ms);
222 extern uint32 si_watchdog_msticks(void);
224 extern uint32 si_gpiocontrol(si_t *sih, uint32 mask, uint32 val, uint8 priority);
225 extern uint32 si_gpioouten(si_t *sih, uint32 mask, uint32 val, uint8 priority);
226 extern uint32 si_gpioout(si_t *sih, uint32 mask, uint32 val, uint8 priority);
227 extern uint32 si_gpioin(si_t *sih);
228 extern uint32 si_gpiointpolarity(si_t *sih, uint32 mask, uint32 val, uint8 priority);
229 extern uint32 si_gpiointmask(si_t *sih, uint32 mask, uint32 val, uint8 priority);
230 extern uint32 si_gpioled(si_t *sih, uint32 mask, uint32 val);
231 extern uint32 si_gpioreserve(si_t *sih, uint32 gpio_num, uint8 priority);
232 extern uint32 si_gpiorelease(si_t *sih, uint32 gpio_num, uint8 priority);
233 extern uint32 si_gpiopull(si_t *sih, bool updown, uint32 mask, uint32 val);
234 extern uint32 si_gpioevent(si_t *sih, uint regtype, uint32 mask, uint32 val);
235 extern uint32 si_gpio_int_enable(si_t *sih, bool enable);
238 extern void *si_gpio_handler_register(si_t *sih, uint32 e, bool lev, gpio_handler_t cb, void *arg);
304 extern uint8 si_pcieclkreq(si_t *sih, uint32 mask, uint32 val);
305 extern uint32 si_pcielcreg(si_t *sih, uint32 mask, uint32 val);
306 extern uint8 si_pcieltrenable(si_t *sih, uint32 mask, uint32 val);
307 extern void si_pcie_set_error_injection(si_t *sih, uint32 mode);
319 extern void si_chipcontrl_restore(si_t *sih, uint32 val);
320 extern uint32 si_chipcontrl_read(si_t *sih);
339 extern uint32 si_ccreg(si_t *sih, uint32 offset, uint32 mask, uint32 val);
340 extern uint32 si_pciereg(si_t *sih, uint32 offset, uint32 mask, uint32 val, uint type);
341 extern uint32 si_pcieserdesreg(si_t *sih, uint32 mdioslave, uint32 offset, uint32 mask, uint32 val);
347 extern uint32 si_pcie_get_bar0(si_t *sih);
355 extern uint32 si_tcm_size(si_t *sih);
357 extern int si_set_sromctl(si_t *sih, uint32 value);
358 extern uint32 si_get_sromctl(si_t *sih);
360 extern uint32 si_gci_direct(si_t *sih, uint offset, uint32 mask, uint32 val);
362 extern void si_gci_set_functionsel(si_t *sih, uint32 pin, uint8 fnsel);
363 extern uint8 si_gci_get_chipctrlreg_idx(uint32 pin, uint32 *regidx, uint32 *pos);
364 extern uint32 si_gci_chipcontrol(si_t *sih, uint reg, uint32 mask, uint32 val);