Lines Matching refs:DFCNTRL
892 mvi DFCNTRL, (PRELOADEN|SCSIEN|HDMAEN);
897 mvi DFCNTRL, SCSIEN;
921 test DFCNTRL, SCSIEN jnz . - 1;
923 test DFCNTRL, SCSIEN jnz .;
1496 test DFCNTRL, SCSIEN jz idle_sgfetch_start;
1559 test DFCNTRL, HDMAENACK jz return;
1591 or DFCNTRL, PRELOADEN|HDMAEN|SCSIENWRDIS;
1593 or DFCNTRL, PRELOADEN|HDMAEN;
1611 mvi DFCNTRL, (PRELOADEN|SCSIEN|HDMAEN);
1693 test DFCNTRL, SCSIEN jnz data_group_dma_loop;
1710 test DFCNTRL, DIRECTION jnz data_phase_finish;
1713 or DFCNTRL, FIFOFLUSH;
1757 test DFCNTRL, DIRECTION jz target_ITloop;
1866 * (DIRECTION set in DFCNTRL). The delay is performed by
1889 test DFCNTRL, DIRECTION jz interrupt_return;
1890 and DFCNTRL, ~SCSIEN;
1895 or DFCNTRL, SCSIEN;
1954 mvi DFCNTRL, PRELOADEN|SCSIEN|HDMAEN;
1976 mvi DFCNTRL, (PRELOADEN|SCSIEN|HDMAEN);
2035 or DFCNTRL, FIFOFLUSH;
2043 test DFCNTRL, DIRECTION jnz pkt_saveptrs_check_status;
2131 or DFCNTRL, FIFOFLUSH;
2252 mvi DFCNTRL, (HDMAEN|SCSIEN|PRELOADEN);
2258 or DFCNTRL, PRELOADEN;