1037 	unsigned int isr_status;  in mvumi_handshake_event()  local
1043 		isr_status = mhba->instancet->read_fw_status_reg(mhba->mmio);  in mvumi_handshake_event()
1053 					mhba->global_isr, isr_status);  in mvumi_handshake_event()
1058 	} while (!(isr_status & DRBL_HANDSHAKE_ISR));  in mvumi_handshake_event()
1326 		if (mhba->isr_status & DRBL_HANDSHAKE_ISR) {  in mvumi_isr_handler()
1330 		if (mhba->isr_status & DRBL_EVENT_NOTIFY)  in mvumi_isr_handler()
1338 	mhba->isr_status = 0;  in mvumi_isr_handler()
1434 	unsigned int status, isr_status = 0, tmp = 0;  in mvumi_clear_intr()  local
1454 		isr_status = ioread32(regs + CPU_ARM_TO_PCIEA_DRBL_REG);  in mvumi_clear_intr()
1455 		if (isr_status)  in mvumi_clear_intr()
1456 			iowrite32(isr_status, regs + CPU_ARM_TO_PCIEA_DRBL_REG);  in mvumi_clear_intr()
1460 	mhba->isr_status = isr_status;  in mvumi_clear_intr()