296 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_enchance_mode()
297 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_enable_must_enchance_mode()
303 	outb(oldlcr, baseio + UART_LCR);  in mxser_enable_must_enchance_mode()
312 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_enchance_mode()
313 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_disable_must_enchance_mode()
319 	outb(oldlcr, baseio + UART_LCR);  in mxser_disable_must_enchance_mode()
328 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_xon1_value()
329 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_set_must_xon1_value()
337 	outb(oldlcr, baseio + UART_LCR);  in mxser_set_must_xon1_value()
345 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_xoff1_value()
346 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_set_must_xoff1_value()
354 	outb(oldlcr, baseio + UART_LCR);  in mxser_set_must_xoff1_value()
362 	oldlcr = inb(info->ioaddr + UART_LCR);  in mxser_set_must_fifo_value()
363 	outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);  in mxser_set_must_fifo_value()
373 	outb(oldlcr, info->ioaddr + UART_LCR);  in mxser_set_must_fifo_value()
381 	oldlcr = inb(baseio + UART_LCR);  in mxser_set_must_enum_value()
382 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_set_must_enum_value()
390 	outb(oldlcr, baseio + UART_LCR);  in mxser_set_must_enum_value()
399 	oldlcr = inb(baseio + UART_LCR);  in mxser_get_must_hardware_id()
400 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_get_must_hardware_id()
408 	outb(oldlcr, baseio + UART_LCR);  in mxser_get_must_hardware_id()
417 	oldlcr = inb(baseio + UART_LCR);  in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
418 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
424 	outb(oldlcr, baseio + UART_LCR);  in SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL()
432 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_tx_software_flow_control()
433 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_enable_must_tx_software_flow_control()
440 	outb(oldlcr, baseio + UART_LCR);  in mxser_enable_must_tx_software_flow_control()
448 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_tx_software_flow_control()
449 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_disable_must_tx_software_flow_control()
455 	outb(oldlcr, baseio + UART_LCR);  in mxser_disable_must_tx_software_flow_control()
463 	oldlcr = inb(baseio + UART_LCR);  in mxser_enable_must_rx_software_flow_control()
464 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_enable_must_rx_software_flow_control()
471 	outb(oldlcr, baseio + UART_LCR);  in mxser_enable_must_rx_software_flow_control()
479 	oldlcr = inb(baseio + UART_LCR);  in mxser_disable_must_rx_software_flow_control()
480 	outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);  in mxser_disable_must_rx_software_flow_control()
486 	outb(oldlcr, baseio + UART_LCR);  in mxser_disable_must_rx_software_flow_control()
495 	outb(0, io + UART_LCR);  in CheckIsMoxaMust()
608 	cval = inb(info->ioaddr + UART_LCR);  in mxser_set_baud()
610 	outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR);	/* set DLAB */  in mxser_set_baud()
614 	outb(cval, info->ioaddr + UART_LCR);	/* reset DLAB */  in mxser_set_baud()
808 	outb(cval, info->ioaddr + UART_LCR);  in mxser_change_speed()
919 	outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR);	/* reset DLAB */  in mxser_activate()
2041 		outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,  in mxser_rs_break()
2042 			info->ioaddr + UART_LCR);  in mxser_rs_break()
2044 		outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,  in mxser_rs_break()
2045 			info->ioaddr + UART_LCR);  in mxser_rs_break()
2476 	scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);  in mxser_get_ISA_conf()
2477 	outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);  in mxser_get_ISA_conf()
2479 	outb(scratch2, cap + UART_LCR);  in mxser_get_ISA_conf()