Lines Matching refs:p
33 #define HC_LENGTH(ehci, p) (0x00ff&((p) >> /* bits 7:0 / offset 00h */ \ argument
35 #define HC_VERSION(ehci, p) (0xffff&((p) >> /* bits 31:16 / offset 02h */ \ argument
38 #define HCS_DEBUG_PORT(p) (((p)>>20)&0xf) /* bits 23:20, debug port? */ argument
39 #define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */ argument
40 #define HCS_N_CC(p) (((p)>>12)&0xf) /* bits 15:12, #companion HCs */ argument
41 #define HCS_N_PCC(p) (((p)>>8)&0xf) /* bits 11:8, ports per CC */ argument
42 #define HCS_PORTROUTED(p) ((p)&(1 << 7)) /* true: port routing */ argument
43 #define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */ argument
44 #define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */ argument
48 #define HCC_32FRAME_PERIODIC_LIST(p) ((p)&(1 << 19)) argument
49 #define HCC_PER_PORT_CHANGE_EVENT(p) ((p)&(1 << 18)) argument
50 #define HCC_LPM(p) ((p)&(1 << 17)) argument
51 #define HCC_HW_PREFETCH(p) ((p)&(1 << 16)) argument
53 #define HCC_EXT_CAPS(p) (((p)>>8)&0xff) /* for pci extended caps */ argument
54 #define HCC_ISOC_CACHE(p) ((p)&(1 << 7)) /* true: can cache isoc frame */ argument
55 #define HCC_ISOC_THRES(p) (((p)>>4)&0x7) /* bits 6:4, uframes cached */ argument
56 #define HCC_CANPARK(p) ((p)&(1 << 2)) /* true: can park on async qh */ argument
57 #define HCC_PGM_FRAMELISTLEN(p) ((p)&(1 << 1)) /* true: periodic_size changes*/ argument
58 #define HCC_64BIT_ADDR(p) ((p)&(1)) /* true: can use 64-bit addr */ argument