1 /* 2 * ADE7758 Poly Phase Multifunction Energy Metering IC driver 3 * 4 * Copyright 2010-2011 Analog Devices Inc. 5 * 6 * Licensed under the GPL-2. 7 */ 8 9 #ifndef _ADE7758_H 10 #define _ADE7758_H 11 12 #define ADE7758_AWATTHR 0x01 13 #define ADE7758_BWATTHR 0x02 14 #define ADE7758_CWATTHR 0x03 15 #define ADE7758_AVARHR 0x04 16 #define ADE7758_BVARHR 0x05 17 #define ADE7758_CVARHR 0x06 18 #define ADE7758_AVAHR 0x07 19 #define ADE7758_BVAHR 0x08 20 #define ADE7758_CVAHR 0x09 21 #define ADE7758_AIRMS 0x0A 22 #define ADE7758_BIRMS 0x0B 23 #define ADE7758_CIRMS 0x0C 24 #define ADE7758_AVRMS 0x0D 25 #define ADE7758_BVRMS 0x0E 26 #define ADE7758_CVRMS 0x0F 27 #define ADE7758_FREQ 0x10 28 #define ADE7758_TEMP 0x11 29 #define ADE7758_WFORM 0x12 30 #define ADE7758_OPMODE 0x13 31 #define ADE7758_MMODE 0x14 32 #define ADE7758_WAVMODE 0x15 33 #define ADE7758_COMPMODE 0x16 34 #define ADE7758_LCYCMODE 0x17 35 #define ADE7758_MASK 0x18 36 #define ADE7758_STATUS 0x19 37 #define ADE7758_RSTATUS 0x1A 38 #define ADE7758_ZXTOUT 0x1B 39 #define ADE7758_LINECYC 0x1C 40 #define ADE7758_SAGCYC 0x1D 41 #define ADE7758_SAGLVL 0x1E 42 #define ADE7758_VPINTLVL 0x1F 43 #define ADE7758_IPINTLVL 0x20 44 #define ADE7758_VPEAK 0x21 45 #define ADE7758_IPEAK 0x22 46 #define ADE7758_GAIN 0x23 47 #define ADE7758_AVRMSGAIN 0x24 48 #define ADE7758_BVRMSGAIN 0x25 49 #define ADE7758_CVRMSGAIN 0x26 50 #define ADE7758_AIGAIN 0x27 51 #define ADE7758_BIGAIN 0x28 52 #define ADE7758_CIGAIN 0x29 53 #define ADE7758_AWG 0x2A 54 #define ADE7758_BWG 0x2B 55 #define ADE7758_CWG 0x2C 56 #define ADE7758_AVARG 0x2D 57 #define ADE7758_BVARG 0x2E 58 #define ADE7758_CVARG 0x2F 59 #define ADE7758_AVAG 0x30 60 #define ADE7758_BVAG 0x31 61 #define ADE7758_CVAG 0x32 62 #define ADE7758_AVRMSOS 0x33 63 #define ADE7758_BVRMSOS 0x34 64 #define ADE7758_CVRMSOS 0x35 65 #define ADE7758_AIRMSOS 0x36 66 #define ADE7758_BIRMSOS 0x37 67 #define ADE7758_CIRMSOS 0x38 68 #define ADE7758_AWAITOS 0x39 69 #define ADE7758_BWAITOS 0x3A 70 #define ADE7758_CWAITOS 0x3B 71 #define ADE7758_AVAROS 0x3C 72 #define ADE7758_BVAROS 0x3D 73 #define ADE7758_CVAROS 0x3E 74 #define ADE7758_APHCAL 0x3F 75 #define ADE7758_BPHCAL 0x40 76 #define ADE7758_CPHCAL 0x41 77 #define ADE7758_WDIV 0x42 78 #define ADE7758_VADIV 0x44 79 #define ADE7758_VARDIV 0x43 80 #define ADE7758_APCFNUM 0x45 81 #define ADE7758_APCFDEN 0x46 82 #define ADE7758_VARCFNUM 0x47 83 #define ADE7758_VARCFDEN 0x48 84 #define ADE7758_CHKSUM 0x7E 85 #define ADE7758_VERSION 0x7F 86 87 #define ADE7758_READ_REG(a) a 88 #define ADE7758_WRITE_REG(a) ((a) | 0x80) 89 90 #define ADE7758_MAX_TX 8 91 #define ADE7758_MAX_RX 4 92 #define ADE7758_STARTUP_DELAY 1 93 94 #define AD7758_NUM_WAVSEL 5 95 #define AD7758_NUM_PHSEL 3 96 #define AD7758_NUM_WAVESRC (AD7758_NUM_WAVSEL * AD7758_NUM_PHSEL) 97 98 #define AD7758_PHASE_A 0 99 #define AD7758_PHASE_B 1 100 #define AD7758_PHASE_C 2 101 #define AD7758_CURRENT 0 102 #define AD7758_VOLTAGE 1 103 #define AD7758_ACT_PWR 2 104 #define AD7758_REACT_PWR 3 105 #define AD7758_APP_PWR 4 106 #define AD7758_WT(p, w) (((w) << 2) | (p)) 107 108 #define DRIVER_NAME "ade7758" 109 110 111 /** 112 * struct ade7758_state - device instance specific data 113 * @us: actual spi_device 114 * @trig: data ready trigger registered with iio 115 * @tx: transmit buffer 116 * @rx: receive buffer 117 * @buf_lock: mutex to protect tx and rx 118 **/ 119 struct ade7758_state { 120 struct spi_device *us; 121 struct iio_trigger *trig; 122 u8 *tx; 123 u8 *rx; 124 struct mutex buf_lock; 125 unsigned long available_scan_masks[AD7758_NUM_WAVESRC]; 126 struct iio_chan_spec *ade7758_ring_channels; 127 struct spi_transfer ring_xfer[4]; 128 struct spi_message ring_msg; 129 /* 130 * DMA (thus cache coherency maintenance) requires the 131 * transfer buffers to live in their own cache lines. 132 */ 133 unsigned char rx_buf[8] ____cacheline_aligned; 134 unsigned char tx_buf[8]; 135 136 }; 137 #ifdef CONFIG_IIO_BUFFER 138 /* At the moment triggers are only used for ring buffer 139 * filling. This may change! 140 */ 141 142 void ade7758_remove_trigger(struct iio_dev *indio_dev); 143 int ade7758_probe_trigger(struct iio_dev *indio_dev); 144 145 ssize_t ade7758_read_data_from_ring(struct device *dev, 146 struct device_attribute *attr, 147 char *buf); 148 149 150 int ade7758_configure_ring(struct iio_dev *indio_dev); 151 void ade7758_unconfigure_ring(struct iio_dev *indio_dev); 152 153 void ade7758_uninitialize_ring(struct iio_dev *indio_dev); 154 int ade7758_set_irq(struct device *dev, bool enable); 155 156 int ade7758_spi_write_reg_8(struct device *dev, 157 u8 reg_address, u8 val); 158 int ade7758_spi_read_reg_8(struct device *dev, 159 u8 reg_address, u8 *val); 160 161 #else /* CONFIG_IIO_BUFFER */ 162 ade7758_remove_trigger(struct iio_dev * indio_dev)163static inline void ade7758_remove_trigger(struct iio_dev *indio_dev) 164 { 165 } ade7758_probe_trigger(struct iio_dev * indio_dev)166static inline int ade7758_probe_trigger(struct iio_dev *indio_dev) 167 { 168 return 0; 169 } 170 ade7758_configure_ring(struct iio_dev * indio_dev)171static int ade7758_configure_ring(struct iio_dev *indio_dev) 172 { 173 return 0; 174 } ade7758_unconfigure_ring(struct iio_dev * indio_dev)175static inline void ade7758_unconfigure_ring(struct iio_dev *indio_dev) 176 { 177 } ade7758_initialize_ring(struct iio_ring_buffer * ring)178static inline int ade7758_initialize_ring(struct iio_ring_buffer *ring) 179 { 180 return 0; 181 } ade7758_uninitialize_ring(struct iio_dev * indio_dev)182static inline void ade7758_uninitialize_ring(struct iio_dev *indio_dev) 183 { 184 } 185 #endif /* CONFIG_IIO_BUFFER */ 186 187 #endif 188