xref: /arch/powerpc/platforms/Kconfig.cputype

config PPC64
	bool "64-bit kernel"
	default n
	help
	  This option selects whether a 32-bit or a 64-bit kernel
	  will be built.

menu "Processor support"
choice
	prompt "Processor Type"
	depends on PPC32
	help
	  There are five families of 32 bit PowerPC chips supported.
	  The most common ones are the desktop and server CPUs (601, 603,
	  604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
	  embedded 512x/52xx/82xx/83xx/86xx counterparts.
	  The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
	  (85xx) each form a family of their own that is not compatible
	  with the others.

	  If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.

config PPC_BOOK3S_32
	bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
	select PPC_FPU

config PPC_85xx
	bool "Freescale 85xx"
	select E500

config PPC_8xx
	bool "Freescale 8xx"
	select FSL_SOC
	select 8xx
	select PPC_LIB_RHEAP

config 40x
	bool "AMCC 40x"
	select PPC_DCR_NATIVE
	select PPC_UDBG_16550
	select 4xx_SOC
	select PPC_PCI_CHOICE

config 44x
	bool "AMCC 44x, 46x or 47x"
	select PPC_DCR_NATIVE
	select PPC_UDBG_16550
	select 4xx_SOC
	select PPC_PCI_CHOICE
	select PHYS_64BIT

config E200
	bool "Freescale e200"

endchoice

choice
	prompt "Processor Type"
	depends on PPC64
	help
	  There are two families of 64 bit PowerPC chips supported.
	  The most common ones are the desktop and server CPUs
	  (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)

	  The other are the "embedded" processors compliant with the
	  "Book 3E" variant of the architecture

config PPC_BOOK3S_64
	bool "Server processors"
	select PPC_FPU
	select PPC_HAVE_PMU_SUPPORT
	select SYS_SUPPORTS_HUGETLBFS

config PPC_BOOK3E_64
	bool "Embedded processors"
	select PPC_FPU # Make it a choice ?
	select PPC_SMP_MUXED_IPI

endchoice

config PPC_BOOK3S
	def_bool y
	depends on PPC_BOOK3S_32 || PPC_BOOK3S_64

config PPC_BOOK3E
	def_bool y
	depends on PPC_BOOK3E_64

config POWER4_ONLY
	bool "Optimize for POWER4"
	depends on PPC64 && PPC_BOOK3S
	default n
	---help---
	  Cause the compiler to optimize for POWER4/POWER5/PPC970 processors.
	  The resulting binary will not work on POWER3 or RS64 processors
	  when compiled with binutils 2.15 or later.

config 6xx
	def_bool y
	depends on PPC32 && PPC_BOOK3S
	select PPC_HAVE_PMU_SUPPORT

config POWER3
	bool
	depends on PPC64 && PPC_BOOK3S
	default y if !POWER4_ONLY

config POWER4
	depends on PPC64 && PPC_BOOK3S
	def_bool y

config PPC_A2
	bool
	depends on PPC_BOOK3E_64

config TUNE_CELL
	bool "Optimize for Cell Broadband Engine"
	depends on PPC64 && PPC_BOOK3S
	help
	  Cause the compiler to optimize for the PPE of the Cell Broadband
	  Engine. This will make the code run considerably faster on Cell
	  but somewhat slower on other machines. This option only changes
	  the scheduling of instructions, not the selection of instructions
	  itself, so the resulting kernel will keep running on all other
	  machines. When building a kernel that is supposed to run only
	  on Cell, you should also select the POWER4_ONLY option.

# this is temp to handle compat with arch=ppc
config 8xx
	bool

config E500
	select FSL_EMB_PERFMON
	select PPC_FSL_BOOK3E
	bool

config PPC_E500MC
	bool "e500mc Support"
	select PPC_FPU
	depends on E500

config PPC_FPU
	bool
	default y if PPC64

config FSL_EMB_PERFMON
	bool "Freescale Embedded Perfmon"
	depends on E500 || PPC_83xx
	help
	  This is the Performance Monitor support found on the e500 core
	  and some e300 cores (c3 and c4).  Select this only if your
	  core supports the Embedded Performance Monitor APU

config FSL_EMB_PERF_EVENT
	bool
	depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
	default y

config FSL_EMB_PERF_EVENT_E500
	bool
	depends on FSL_EMB_PERF_EVENT && E500
	default y

config 4xx
	bool
	depends on 40x || 44x
	default y

config BOOKE
	bool
	depends on E200 || E500 || 44x || PPC_BOOK3E
	default y

config FSL_BOOKE
	bool
	depends on (E200 || E500) && PPC32
	default y

# this is for common code between PPC32 & PPC64 FSL BOOKE
config PPC_FSL_BOOK3E
	bool
	select FSL_EMB_PERFMON
	select PPC_SMP_MUXED_IPI
	select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
	default y if FSL_BOOKE

config PTE_64BIT
	bool
	depends on 44x || E500 || PPC_86xx
	default y if PHYS_64BIT

config PHYS_64BIT
	bool 'Large physical address support' if E500 || PPC_86xx
	depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
	---help---
	  This option enables kernel support for larger than 32-bit physical
	  addresses.  This feature may not be available on all cores.

	  If you have more than 3.5GB of RAM or so, you also need to enable
	  SWIOTLB under Kernel Options for this to work.  The actual number
	  is platform-dependent.

	  If in doubt, say N here.

config ALTIVEC
	bool "AltiVec Support"
	depends on 6xx || POWER4
	---help---
	  This option enables kernel support for the Altivec extensions to the
	  PowerPC processor. The kernel currently supports saving and restoring
	  altivec registers, and turning on the 'altivec enable' bit so user
	  processes can execute altivec instructions.

	  This option is only usefully if you have a processor that supports
	  altivec (G4, otherwise known as 74xx series), but does not have
	  any affect on a non-altivec cpu (it does, however add code to the
	  kernel).

	  If in doubt, say Y here.

config VSX
	bool "VSX Support"
	depends on POWER4 && ALTIVEC && PPC_FPU
	---help---

	  This option enables kernel support for the Vector Scaler extensions
	  to the PowerPC processor. The kernel currently supports saving and
	  restoring VSX registers, and turning on the 'VSX enable' bit so user
	  processes can execute VSX instructions.

	  This option is only useful if you have a processor that supports
	  VSX (P7 and above), but does not have any affect on a non-VSX
	  CPUs (it does, however add code to the kernel).

	  If in doubt, say Y here.

config PPC_ICSWX
	bool "Support for PowerPC icswx coprocessor instruction"
	depends on POWER4 || PPC_A2
	default n
	---help---

	  This option enables kernel support for the PowerPC Initiate
	  Coprocessor Store Word (icswx) coprocessor instruction on POWER7
	  or newer processors.

	  This option is only useful if you have a processor that supports
	  the icswx coprocessor instruction. It does not have any effect
	  on processors without the icswx coprocessor instruction.

	  This option slightly increases kernel memory usage.

	  If in doubt, say N here.

config PPC_ICSWX_PID
	bool "icswx requires direct PID management"
	depends on PPC_ICSWX && POWER4
	default y
	---help---
	  The PID register in server is used explicitly for ICSWX.  In
	  embedded systems PID managment is done by the system.

config PPC_ICSWX_USE_SIGILL
	bool "Should a bad CT cause a SIGILL?"
	depends on PPC_ICSWX
	default n
	---help---
	  Should a bad CT used for "non-record form ICSWX" cause an
	  illegal intruction signal or should it be silent as
	  architected.

	  If in doubt, say N here.

config SPE
	bool "SPE Support"
	depends on E200 || (E500 && !PPC_E500MC)
	default y
	---help---
	  This option enables kernel support for the Signal Processing
	  Extensions (SPE) to the PowerPC processor. The kernel currently
	  supports saving and restoring SPE registers, and turning on the
	  'spe enable' bit so user processes can execute SPE instructions.

	  This option is only useful if you have a processor that supports
	  SPE (e500, otherwise known as 85xx series), but does not have any
	  effect on a non-spe cpu (it does, however add code to the kernel).

	  If in doubt, say Y here.

config PPC_STD_MMU
	def_bool y
	depends on PPC_BOOK3S

config PPC_STD_MMU_32
	def_bool y
	depends on PPC_STD_MMU && PPC32

config PPC_STD_MMU_64
	def_bool y
	depends on PPC_STD_MMU && PPC64

config PPC_MMU_NOHASH
	def_bool y
	depends on !PPC_STD_MMU

config PPC_BOOK3E_MMU
	def_bool y
	depends on FSL_BOOKE || PPC_BOOK3E

config PPC_MM_SLICES
	bool
	default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES)
	default n

config VIRT_CPU_ACCOUNTING
	bool "Deterministic task and CPU time accounting"
	depends on PPC64
	default y
	help
	  Select this option to enable more accurate task and CPU time
	  accounting.  This is done by reading a CPU counter on each
	  kernel entry and exit and on transitions within the kernel
	  between system, softirq and hardirq state, so there is a
	  small performance impact.  This also enables accounting of
	  stolen time on logically-partitioned systems running on
	  IBM POWER5-based machines.

	  If in doubt, say Y here.

config PPC_HAVE_PMU_SUPPORT
       bool

config PPC_PERF_CTRS
       def_bool y
       depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
       help
         This enables the powerpc-specific perf_event back-end.

config SMP
	depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
	bool "Symmetric multi-processing support"
	---help---
	  This enables support for systems with more than one CPU. If you have
	  a system with only one CPU, say N. If you have a system with more
	  than one CPU, say Y.  Note that the kernel does not currently
	  support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
	  since they have inadequate hardware support for multiprocessor
	  operation.

	  If you say N here, the kernel will run on single and multiprocessor
	  machines, but will use only one CPU of a multiprocessor machine. If
	  you say Y here, the kernel will run on single-processor machines.
	  On a single-processor machine, the kernel will run faster if you say
	  N here.

	  If you don't know what to do here, say N.

config NR_CPUS
	int "Maximum number of CPUs (2-8192)"
	range 2 8192
	depends on SMP
	default "32" if PPC64
	default "4"

config NOT_COHERENT_CACHE
	bool
	depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
	default n if PPC_47x
	default y

config CHECK_CACHE_COHERENCY
	bool

endmenu