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Searched defs:DMA0_IRQ_STATUS (Results 1 – 6 of 6) sorted by relevance

/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h197 #define DMA0_IRQ_STATUS 0xFFC00C28 /* DMA Channel 0 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h230 #define DMA0_IRQ_STATUS 0xFFC00C28 /* DMA Channel 0 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h230 #define DMA0_IRQ_STATUS 0xFFC00C28 /* DMA Channel 0 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h206 #define DMA0_IRQ_STATUS 0xFFC00C28 /* DMA Channel 0 Interrupt/Status Register … macro
/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h207 #define DMA0_IRQ_STATUS 0xFFC00C28 /* DMA Channel 0 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h216 #define DMA0_IRQ_STATUS 0xffc00c28 /* DMA Channel 0 Interrupt/Status Register */ macro