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Searched defs:IRQ_SPORT0_TX (Results 1 – 12 of 12) sorted by relevance

/arch/blackfin/mach-bf533/include/mach/
Dirq.h24 #define IRQ_SPORT0_TX BFIN_IRQ(10) /* DMA2 Interrupt (SPORT0 TX) */ macro
/arch/blackfin/mach-bf537/
DKconfig28 config IRQ_SPORT0_TX config
/arch/blackfin/mach-bf538/include/mach/
Dirq.h24 #define IRQ_SPORT0_TX BFIN_IRQ(10) /* DMA 2 Channel (SPORT0 TX) */ macro
/arch/blackfin/mach-bf537/include/mach/
Dirq.h20 #define IRQ_SPORT0_TX BFIN_IRQ(6) /* DMA4 Interrupt (SPORT0 TX) */ macro
/arch/blackfin/mach-bf538/
DKconfig40 config IRQ_SPORT0_TX config
/arch/blackfin/mach-bf527/include/mach/
Dirq.h29 #define IRQ_SPORT0_TX BFIN_IRQ(17) /* DMA 4 Channel (SPORT0 TX) */ macro
/arch/blackfin/mach-bf518/include/mach/
Dirq.h30 #define IRQ_SPORT0_TX BFIN_IRQ(17) /* DMA 4 Channel (SPORT0 TX) */ macro
/arch/blackfin/mach-bf561/include/mach/
Dirq.h45 #define IRQ_SPORT0_TX IRQ_DMA2_1 /* DMA2 1 (SPORT0 TX) */ macro
/arch/blackfin/mach-bf527/
DKconfig196 config IRQ_SPORT0_TX config
/arch/blackfin/mach-bf518/
DKconfig197 config IRQ_SPORT0_TX config
/arch/blackfin/mach-bf548/
DKconfig137 config IRQ_SPORT0_TX config
/arch/blackfin/mach-bf548/include/mach/
Dirq.h24 #define IRQ_SPORT0_TX BFIN_IRQ(10) /* SPORT0 TX Interrupt (DMA1) */ macro