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Searched defs:M (Results 1 – 16 of 16) sorted by relevance

/arch/mips/include/asm/
Dfpu_emulator.h43 #define MIPS_FPU_EMU_INC_STATS(M) \ argument
51 #define MIPS_FPU_EMU_INC_STATS(M) do { } while (0) argument
/arch/frv/kernel/
Dirq-mb93091.c30 #define __set_IMR(M) do { __reg16(0xffc00004) = (M); wmb(); } while(0) argument
32 #define __clr_IFR(M) do { __reg16(0xffc0000c) = ~(M); wmb(); } while(0) argument
Dirq-mb93093.c30 #define __set_IMR(M) do { __reg16(0x0a) = (M); wmb(); } while(0) argument
32 #define __clr_IFR(M) do { __reg16(0x02) = ~(M); wmb(); } while(0) argument
/arch/mips/lantiq/xway/
Dclk-xway.c112 static inline unsigned int mash_dsm(int pll, unsigned int M, unsigned int N, in mash_dsm()
121 static inline unsigned int ssff_dsm_1(int pll, unsigned int M, unsigned int N, in ssff_dsm_1()
130 static inline unsigned int ssff_dsm_2(int pll, unsigned int M, unsigned int N, in ssff_dsm_2()
140 static inline unsigned int dsm(int pll, unsigned int M, unsigned int N, in dsm()
/arch/arm/include/asm/
Dhw_breakpoint.h101 #define ARM_DBG_READ(M, OP2, VAL) do {\ argument
105 #define ARM_DBG_WRITE(M, OP2, VAL) do {\ argument
/arch/arm/mach-pxa/
Dpxa27x.c79 unsigned int l, L, m, M, n2, N, S; in pxa27x_get_clk_frequency_khz() local
121 unsigned int l, L, m, M; in clk_pxa27x_mem_getrate() local
Dpxa25x.c68 unsigned int l, L, m, M, n2, N; in pxa25x_get_clk_frequency_khz() local
/arch/sh/math-emu/
Dmath.c68 #define CMP_X(SZ,R,M,N) do{ \ argument
72 #define EQ_X(SZ,R,M,N) do{ \ argument
99 #define ARITH_X(SZ,OP,M,N) do{ \ argument
/arch/arm/kernel/
Dhw_breakpoint.c55 #define READ_WB_REG_CASE(OP2, M, VAL) \ argument
60 #define WRITE_WB_REG_CASE(OP2, M, VAL) \ argument
/arch/mips/math-emu/
Dcp1emu.c1393 #define FPU_STAT_CREATE(M) \ in debugfs_fpuemu() argument
/arch/powerpc/kernel/
Dalign.c45 #define M 0x10 /* multiple load/store */ macro
/arch/ia64/kernel/
Dkprobes.c45 enum instruction_type {A, I, M, F, B, L, X, u}; enumerator
/arch/mips/mm/
Duasm.c82 #define M(a, b, c, d, e, f) \ macro
/arch/sparc/kernel/
Dtraps_64.c1059 #define M 147 macro
/arch/powerpc/xmon/
Dppc-opc.c1610 #define M(op, rc) (OP (op) | ((rc) & 1)) macro
/arch/arm/mach-msm/include/mach/
Diommu_hw-8xxx.h1136 #define M (M_MASK << M_SHIFT) macro