| /arch/blackfin/kernel/ |
| D | fixed_code.S | 40 R0 = [P0]; define
56 R0 = [P0]; define
74 R0 = R1 + R0; define
89 R0 = R1 - R0; define
104 R0 = R1 | R0; define
119 R0 = R1 & R0; define
134 R0 = R1 ^ R0; define
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| /arch/blackfin/lib/ |
| D | umulsi3_highpart.S | 19 R0 = R1.L * R0.L, R1 = R1.H * R0.L (FU); define
23 R0 = R0 + R3; define
24 R0 = R0 + R1; define
28 R0 = R1 + R2; define
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| D | strncmp.S | 31 R0 = B[P0++] (Z); /* get *s1 */ define
41 R0 = 0; /* strings are equal */ define
44 R0 = R0 - R1; /* *s1 - *s2 */ define
49 R0 = 0; define
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| D | strncpy.S | 69 R0 = RETS; define
71 R0 = P0; define
73 R0 = I0; define
75 R0 = I1; define
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| D | divsi3.S | 40 R0 = ABS R0; define
75 R0 = R0.L (Z); define
118 R0 = 0 ; /* Clear msw partial remainder */ define
125 R0 = R0 << 1 || R5 = [SP]; define
126 R0 = R0 | R7; /* and add carry */ define
130 R0 = R0 + R5; /* do add or subtract, as indicated by AQ */ define
161 R0 = R2; /* Return an identity value */ define
187 R0 = LSHIFT R0 by R1.L; define
196 R0 = 0; define
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| D | memcmp.S | 42 R0 = [P0++]; define
61 R0 = B[P0++](Z); /* *s1 */ define
68 R0 = R0 - R1; define
88 R0 = 0; define
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| D | strcmp.S | 31 R0 = B[P0++] (Z); /* get *s1 */ define
39 R0 = R0 - R1; /* *s1 - *s2 */ define
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| D | modsi3.S | 47 R0 = R7 - R0; /* Dividend - (quotient * divisor) */ define
53 R0 = 0; define
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| D | umodsi3.S | 40 R0 = R7 - R0; /* Dividend - (quotient * divisor) */ define
45 R0 = 0; define
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| D | outs.S | 63 R0 = B[P1++]; define
64 R0 = R0 << 8; define
65 R0 = R0 + R1; define
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| D | muldi3.S | 63 R0 = A1.w; define
69 R0 = PACK (R0.l, R3.l); define
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| D | smulsi3_highpart.S | 20 R0 = R0.H * R1.H, R1 = R0.H * R1.L (IS,M); define
35 R0 = R0 + R1; define
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| D | memset.S | 73 R0 = 4; define
74 R0 = R0 - R2; define
76 R0 = P0; /* Recover return address */ define
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| D | udivsi3.S | 63 R0 = R0.L (Z); define
180 R0 = R2; /* Store quotient */ define
197 R0 = R2; define
220 R0 = LSHIFT R0 by R1.L; define
265 R0 = R3; /* Copy Q into result reg */ define
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| D | memchr.S | 43 R0 = P0; define
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| /arch/hexagon/kernel/ |
| D | vm_entry.S | 181 R0 = #VM_INT_DISABLE define
186 R0 = memw(R29 + #_PT_ER_VMEST); define
194 R0 = #VM_INT_DISABLE define
204 R0 = memw(THREADINFO_REG + #_THREAD_INFO_FLAGS); define
228 R0 = R29; /* regs should still be at top of stack */ define
233 R0 = #VM_INT_DISABLE define
242 R0 = R29 define
|
| /arch/blackfin/mach-bf561/ |
| D | secondary.S | 28 R0 = SYSCFG_SNEN; define
30 R0 = SYSCFG_SNEN | SYSCFG_CCEN; define
145 R0 = IWR_DISABLE_ALL; define
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| /arch/blackfin/mach-common/ |
| D | head.S | 37 R0 = SYSCFG_SNEN; define
39 R0 = SYSCFG_SNEN | SYSCFG_CCEN; define
222 R0 = R7; define
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| D | dpmc_modes.S | 33 R0 = IWR_ENABLE(0); define
68 R0 = IWR_DISABLE_ALL; define
93 R0 = IWR_ENABLE(0); define
133 R0 = P3; define
140 R0 = W[P0](z); define
148 R0 = IWR_ENABLE(0); define
272 R0 = W[P0] (Z); define
602 R0 = M3; define
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| D | interrupt.S | 164 R0 = 0; define
190 R0 = R0 | R1; define
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| D | cache.S | 34 R0 = R0 & R2; define
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| /arch/hexagon/mm/ |
| D | strnlen_user.S | 115 R0 = sub(start,isrc); define
121 R0 = add(max,#1); define
129 R0 = #0; define
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| /arch/x86/crypto/ |
| D | twofish-x86_64-asm_64.S | 41 #define R0 %rax macro
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| /arch/m32r/kernel/ |
| D | entry.S | 87 #define R0(reg) @(0x10,reg) macro
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| /arch/cris/arch-v10/kernel/ |
| D | kgdb.c | 382 R0, R1, R2, R3, enumerator
|