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1  /*
2   * Copyright 2010 Tilera Corporation. All Rights Reserved.
3   *
4   *   This program is free software; you can redistribute it and/or
5   *   modify it under the terms of the GNU General Public License
6   *   as published by the Free Software Foundation, version 2.
7   *
8   *   This program is distributed in the hope that it will be useful, but
9   *   WITHOUT ANY WARRANTY; without even the implied warranty of
10   *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11   *   NON INFRINGEMENT.  See the GNU General Public License for
12   *   more details.
13   */
14  
15  #ifndef __DOXYGEN__
16  
17  #ifndef __ARCH_SPR_DEF_H__
18  #define __ARCH_SPR_DEF_H__
19  
20  #define SPR_AUX_PERF_COUNT_0 0x6005
21  #define SPR_AUX_PERF_COUNT_1 0x6006
22  #define SPR_AUX_PERF_COUNT_CTL 0x6007
23  #define SPR_AUX_PERF_COUNT_STS 0x6008
24  #define SPR_CYCLE_HIGH 0x4e06
25  #define SPR_CYCLE_LOW 0x4e07
26  #define SPR_DMA_BYTE 0x3900
27  #define SPR_DMA_CHUNK_SIZE 0x3901
28  #define SPR_DMA_CTR 0x3902
29  #define SPR_DMA_CTR__REQUEST_MASK  0x1
30  #define SPR_DMA_CTR__SUSPEND_MASK  0x2
31  #define SPR_DMA_DST_ADDR 0x3903
32  #define SPR_DMA_DST_CHUNK_ADDR 0x3904
33  #define SPR_DMA_SRC_ADDR 0x3905
34  #define SPR_DMA_SRC_CHUNK_ADDR 0x3906
35  #define SPR_DMA_STATUS__DONE_MASK  0x1
36  #define SPR_DMA_STATUS__BUSY_MASK  0x2
37  #define SPR_DMA_STATUS__RUNNING_MASK  0x10
38  #define SPR_DMA_STRIDE 0x3907
39  #define SPR_DMA_USER_STATUS 0x3908
40  #define SPR_DONE 0x4e08
41  #define SPR_EVENT_BEGIN 0x4e0d
42  #define SPR_EVENT_END 0x4e0e
43  #define SPR_EX_CONTEXT_0_0 0x4a05
44  #define SPR_EX_CONTEXT_0_1 0x4a06
45  #define SPR_EX_CONTEXT_0_1__PL_SHIFT 0
46  #define SPR_EX_CONTEXT_0_1__PL_RMASK 0x3
47  #define SPR_EX_CONTEXT_0_1__PL_MASK  0x3
48  #define SPR_EX_CONTEXT_0_1__ICS_SHIFT 2
49  #define SPR_EX_CONTEXT_0_1__ICS_RMASK 0x1
50  #define SPR_EX_CONTEXT_0_1__ICS_MASK  0x4
51  #define SPR_EX_CONTEXT_1_0 0x4805
52  #define SPR_EX_CONTEXT_1_1 0x4806
53  #define SPR_EX_CONTEXT_1_1__PL_SHIFT 0
54  #define SPR_EX_CONTEXT_1_1__PL_RMASK 0x3
55  #define SPR_EX_CONTEXT_1_1__PL_MASK  0x3
56  #define SPR_EX_CONTEXT_1_1__ICS_SHIFT 2
57  #define SPR_EX_CONTEXT_1_1__ICS_RMASK 0x1
58  #define SPR_EX_CONTEXT_1_1__ICS_MASK  0x4
59  #define SPR_EX_CONTEXT_2_0 0x4605
60  #define SPR_EX_CONTEXT_2_1 0x4606
61  #define SPR_EX_CONTEXT_2_1__PL_SHIFT 0
62  #define SPR_EX_CONTEXT_2_1__PL_RMASK 0x3
63  #define SPR_EX_CONTEXT_2_1__PL_MASK  0x3
64  #define SPR_EX_CONTEXT_2_1__ICS_SHIFT 2
65  #define SPR_EX_CONTEXT_2_1__ICS_RMASK 0x1
66  #define SPR_EX_CONTEXT_2_1__ICS_MASK  0x4
67  #define SPR_FAIL 0x4e09
68  #define SPR_INTCTRL_0_STATUS 0x4a07
69  #define SPR_INTCTRL_1_STATUS 0x4807
70  #define SPR_INTCTRL_2_STATUS 0x4607
71  #define SPR_INTERRUPT_CRITICAL_SECTION 0x4e0a
72  #define SPR_INTERRUPT_MASK_0_0 0x4a08
73  #define SPR_INTERRUPT_MASK_0_1 0x4a09
74  #define SPR_INTERRUPT_MASK_1_0 0x4809
75  #define SPR_INTERRUPT_MASK_1_1 0x480a
76  #define SPR_INTERRUPT_MASK_2_0 0x4608
77  #define SPR_INTERRUPT_MASK_2_1 0x4609
78  #define SPR_INTERRUPT_MASK_RESET_0_0 0x4a0a
79  #define SPR_INTERRUPT_MASK_RESET_0_1 0x4a0b
80  #define SPR_INTERRUPT_MASK_RESET_1_0 0x480b
81  #define SPR_INTERRUPT_MASK_RESET_1_1 0x480c
82  #define SPR_INTERRUPT_MASK_RESET_2_0 0x460a
83  #define SPR_INTERRUPT_MASK_RESET_2_1 0x460b
84  #define SPR_INTERRUPT_MASK_SET_0_0 0x4a0c
85  #define SPR_INTERRUPT_MASK_SET_0_1 0x4a0d
86  #define SPR_INTERRUPT_MASK_SET_1_0 0x480d
87  #define SPR_INTERRUPT_MASK_SET_1_1 0x480e
88  #define SPR_INTERRUPT_MASK_SET_2_0 0x460c
89  #define SPR_INTERRUPT_MASK_SET_2_1 0x460d
90  #define SPR_MPL_DMA_CPL_SET_0 0x5800
91  #define SPR_MPL_DMA_CPL_SET_1 0x5801
92  #define SPR_MPL_DMA_CPL_SET_2 0x5802
93  #define SPR_MPL_DMA_NOTIFY_SET_0 0x3800
94  #define SPR_MPL_DMA_NOTIFY_SET_1 0x3801
95  #define SPR_MPL_DMA_NOTIFY_SET_2 0x3802
96  #define SPR_MPL_INTCTRL_0_SET_0 0x4a00
97  #define SPR_MPL_INTCTRL_0_SET_1 0x4a01
98  #define SPR_MPL_INTCTRL_0_SET_2 0x4a02
99  #define SPR_MPL_INTCTRL_1_SET_0 0x4800
100  #define SPR_MPL_INTCTRL_1_SET_1 0x4801
101  #define SPR_MPL_INTCTRL_1_SET_2 0x4802
102  #define SPR_MPL_INTCTRL_2_SET_0 0x4600
103  #define SPR_MPL_INTCTRL_2_SET_1 0x4601
104  #define SPR_MPL_INTCTRL_2_SET_2 0x4602
105  #define SPR_MPL_SN_ACCESS_SET_0 0x0800
106  #define SPR_MPL_SN_ACCESS_SET_1 0x0801
107  #define SPR_MPL_SN_ACCESS_SET_2 0x0802
108  #define SPR_MPL_SN_CPL_SET_0 0x5a00
109  #define SPR_MPL_SN_CPL_SET_1 0x5a01
110  #define SPR_MPL_SN_CPL_SET_2 0x5a02
111  #define SPR_MPL_SN_FIREWALL_SET_0 0x2c00
112  #define SPR_MPL_SN_FIREWALL_SET_1 0x2c01
113  #define SPR_MPL_SN_FIREWALL_SET_2 0x2c02
114  #define SPR_MPL_SN_NOTIFY_SET_0 0x2a00
115  #define SPR_MPL_SN_NOTIFY_SET_1 0x2a01
116  #define SPR_MPL_SN_NOTIFY_SET_2 0x2a02
117  #define SPR_MPL_UDN_ACCESS_SET_0 0x0c00
118  #define SPR_MPL_UDN_ACCESS_SET_1 0x0c01
119  #define SPR_MPL_UDN_ACCESS_SET_2 0x0c02
120  #define SPR_MPL_UDN_AVAIL_SET_0 0x4000
121  #define SPR_MPL_UDN_AVAIL_SET_1 0x4001
122  #define SPR_MPL_UDN_AVAIL_SET_2 0x4002
123  #define SPR_MPL_UDN_CA_SET_0 0x3c00
124  #define SPR_MPL_UDN_CA_SET_1 0x3c01
125  #define SPR_MPL_UDN_CA_SET_2 0x3c02
126  #define SPR_MPL_UDN_COMPLETE_SET_0 0x1400
127  #define SPR_MPL_UDN_COMPLETE_SET_1 0x1401
128  #define SPR_MPL_UDN_COMPLETE_SET_2 0x1402
129  #define SPR_MPL_UDN_FIREWALL_SET_0 0x3000
130  #define SPR_MPL_UDN_FIREWALL_SET_1 0x3001
131  #define SPR_MPL_UDN_FIREWALL_SET_2 0x3002
132  #define SPR_MPL_UDN_REFILL_SET_0 0x1000
133  #define SPR_MPL_UDN_REFILL_SET_1 0x1001
134  #define SPR_MPL_UDN_REFILL_SET_2 0x1002
135  #define SPR_MPL_UDN_TIMER_SET_0 0x3600
136  #define SPR_MPL_UDN_TIMER_SET_1 0x3601
137  #define SPR_MPL_UDN_TIMER_SET_2 0x3602
138  #define SPR_MPL_WORLD_ACCESS_SET_0 0x4e00
139  #define SPR_MPL_WORLD_ACCESS_SET_1 0x4e01
140  #define SPR_MPL_WORLD_ACCESS_SET_2 0x4e02
141  #define SPR_PASS 0x4e0b
142  #define SPR_PERF_COUNT_0 0x4205
143  #define SPR_PERF_COUNT_1 0x4206
144  #define SPR_PERF_COUNT_CTL 0x4207
145  #define SPR_PERF_COUNT_DN_CTL 0x4210
146  #define SPR_PERF_COUNT_STS 0x4208
147  #define SPR_PROC_STATUS 0x4f00
148  #define SPR_SIM_CONTROL 0x4e0c
149  #define SPR_SNCTL 0x0805
150  #define SPR_SNCTL__FRZFABRIC_MASK  0x1
151  #define SPR_SNCTL__FRZPROC_MASK  0x2
152  #define SPR_SNPC 0x080b
153  #define SPR_SNSTATIC 0x080c
154  #define SPR_SYSTEM_SAVE_0_0 0x4b00
155  #define SPR_SYSTEM_SAVE_0_1 0x4b01
156  #define SPR_SYSTEM_SAVE_0_2 0x4b02
157  #define SPR_SYSTEM_SAVE_0_3 0x4b03
158  #define SPR_SYSTEM_SAVE_1_0 0x4900
159  #define SPR_SYSTEM_SAVE_1_1 0x4901
160  #define SPR_SYSTEM_SAVE_1_2 0x4902
161  #define SPR_SYSTEM_SAVE_1_3 0x4903
162  #define SPR_SYSTEM_SAVE_2_0 0x4700
163  #define SPR_SYSTEM_SAVE_2_1 0x4701
164  #define SPR_SYSTEM_SAVE_2_2 0x4702
165  #define SPR_SYSTEM_SAVE_2_3 0x4703
166  #define SPR_TILE_COORD 0x4c17
167  #define SPR_TILE_RTF_HWM 0x4e10
168  #define SPR_TILE_TIMER_CONTROL 0x3205
169  #define SPR_TILE_WRITE_PENDING 0x4e0f
170  #define SPR_UDN_AVAIL_EN 0x4005
171  #define SPR_UDN_CA_DATA 0x0d00
172  #define SPR_UDN_DATA_AVAIL 0x0d03
173  #define SPR_UDN_DEADLOCK_TIMEOUT 0x3606
174  #define SPR_UDN_DEMUX_CA_COUNT 0x0c05
175  #define SPR_UDN_DEMUX_COUNT_0 0x0c06
176  #define SPR_UDN_DEMUX_COUNT_1 0x0c07
177  #define SPR_UDN_DEMUX_COUNT_2 0x0c08
178  #define SPR_UDN_DEMUX_COUNT_3 0x0c09
179  #define SPR_UDN_DEMUX_CTL 0x0c0a
180  #define SPR_UDN_DEMUX_QUEUE_SEL 0x0c0c
181  #define SPR_UDN_DEMUX_STATUS 0x0c0d
182  #define SPR_UDN_DEMUX_WRITE_FIFO 0x0c0e
183  #define SPR_UDN_DIRECTION_PROTECT 0x3005
184  #define SPR_UDN_REFILL_EN 0x1005
185  #define SPR_UDN_SP_FIFO_DATA 0x0c11
186  #define SPR_UDN_SP_FIFO_SEL 0x0c12
187  #define SPR_UDN_SP_FREEZE 0x0c13
188  #define SPR_UDN_SP_FREEZE__SP_FRZ_MASK  0x1
189  #define SPR_UDN_SP_FREEZE__DEMUX_FRZ_MASK  0x2
190  #define SPR_UDN_SP_FREEZE__NON_DEST_EXT_MASK  0x4
191  #define SPR_UDN_SP_STATE 0x0c14
192  #define SPR_UDN_TAG_0 0x0c15
193  #define SPR_UDN_TAG_1 0x0c16
194  #define SPR_UDN_TAG_2 0x0c17
195  #define SPR_UDN_TAG_3 0x0c18
196  #define SPR_UDN_TAG_VALID 0x0c19
197  #define SPR_UDN_TILE_COORD 0x0c1a
198  
199  #endif /* !defined(__ARCH_SPR_DEF_H__) */
200  
201  #endif /* !defined(__DOXYGEN__) */
202