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1 /*
2  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
3  * Copyright (c) 2007-2008 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23  * IN THE SOFTWARE.
24  */
25 #ifndef __INTEL_DRV_H__
26 #define __INTEL_DRV_H__
27 
28 #include <linux/i2c.h>
29 #include "i915_drm.h"
30 #include "i915_drv.h"
31 #include "drm_crtc.h"
32 #include "drm_crtc_helper.h"
33 #include "drm_fb_helper.h"
34 
35 #define _wait_for(COND, MS, W) ({ \
36 	unsigned long timeout__ = jiffies + msecs_to_jiffies(MS);	\
37 	int ret__ = 0;							\
38 	while (!(COND)) {						\
39 		if (time_after(jiffies, timeout__)) {			\
40 			ret__ = -ETIMEDOUT;				\
41 			break;						\
42 		}							\
43 		if (W && drm_can_sleep()) msleep(W);	\
44 	}								\
45 	ret__;								\
46 })
47 
48 #define wait_for(COND, MS) _wait_for(COND, MS, 1)
49 #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
50 
51 #define KHz(x) (1000*x)
52 #define MHz(x) KHz(1000*x)
53 
54 /*
55  * Display related stuff
56  */
57 
58 /* store information about an Ixxx DVO */
59 /* The i830->i865 use multiple DVOs with multiple i2cs */
60 /* the i915, i945 have a single sDVO i2c bus - which is different */
61 #define MAX_OUTPUTS 6
62 /* maximum connectors per crtcs in the mode set */
63 #define INTELFB_CONN_LIMIT 4
64 
65 #define INTEL_I2C_BUS_DVO 1
66 #define INTEL_I2C_BUS_SDVO 2
67 
68 /* these are outputs from the chip - integrated only
69    external chips are via DVO or SDVO output */
70 #define INTEL_OUTPUT_UNUSED 0
71 #define INTEL_OUTPUT_ANALOG 1
72 #define INTEL_OUTPUT_DVO 2
73 #define INTEL_OUTPUT_SDVO 3
74 #define INTEL_OUTPUT_LVDS 4
75 #define INTEL_OUTPUT_TVOUT 5
76 #define INTEL_OUTPUT_HDMI 6
77 #define INTEL_OUTPUT_DISPLAYPORT 7
78 #define INTEL_OUTPUT_EDP 8
79 
80 /* Intel Pipe Clone Bit */
81 #define INTEL_HDMIB_CLONE_BIT 1
82 #define INTEL_HDMIC_CLONE_BIT 2
83 #define INTEL_HDMID_CLONE_BIT 3
84 #define INTEL_HDMIE_CLONE_BIT 4
85 #define INTEL_HDMIF_CLONE_BIT 5
86 #define INTEL_SDVO_NON_TV_CLONE_BIT 6
87 #define INTEL_SDVO_TV_CLONE_BIT 7
88 #define INTEL_SDVO_LVDS_CLONE_BIT 8
89 #define INTEL_ANALOG_CLONE_BIT 9
90 #define INTEL_TV_CLONE_BIT 10
91 #define INTEL_DP_B_CLONE_BIT 11
92 #define INTEL_DP_C_CLONE_BIT 12
93 #define INTEL_DP_D_CLONE_BIT 13
94 #define INTEL_LVDS_CLONE_BIT 14
95 #define INTEL_DVO_TMDS_CLONE_BIT 15
96 #define INTEL_DVO_LVDS_CLONE_BIT 16
97 #define INTEL_EDP_CLONE_BIT 17
98 
99 #define INTEL_DVO_CHIP_NONE 0
100 #define INTEL_DVO_CHIP_LVDS 1
101 #define INTEL_DVO_CHIP_TMDS 2
102 #define INTEL_DVO_CHIP_TVOUT 4
103 
104 /* drm_display_mode->private_flags */
105 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
106 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
107 #define INTEL_MODE_DP_FORCE_6BPC (0x10)
108 /* This flag must be set by the encoder's mode_fixup if it changes the crtc
109  * timings in the mode to prevent the crtc fixup from overwriting them.
110  * Currently only lvds needs that. */
111 #define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
112 
113 static inline void
intel_mode_set_pixel_multiplier(struct drm_display_mode * mode,int multiplier)114 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
115 				int multiplier)
116 {
117 	mode->clock *= multiplier;
118 	mode->private_flags |= multiplier;
119 }
120 
121 static inline int
intel_mode_get_pixel_multiplier(const struct drm_display_mode * mode)122 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
123 {
124 	return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
125 }
126 
127 struct intel_framebuffer {
128 	struct drm_framebuffer base;
129 	struct drm_i915_gem_object *obj;
130 };
131 
132 struct intel_fbdev {
133 	struct drm_fb_helper helper;
134 	struct intel_framebuffer ifb;
135 	struct list_head fbdev_list;
136 	struct drm_display_mode *our_mode;
137 };
138 
139 struct intel_encoder {
140 	struct drm_encoder base;
141 	int type;
142 	bool needs_tv_clock;
143 	void (*hot_plug)(struct intel_encoder *);
144 	int crtc_mask;
145 	int clone_mask;
146 };
147 
148 struct intel_connector {
149 	struct drm_connector base;
150 	struct intel_encoder *encoder;
151 };
152 
153 struct intel_crtc {
154 	struct drm_crtc base;
155 	enum pipe pipe;
156 	enum plane plane;
157 	u8 lut_r[256], lut_g[256], lut_b[256];
158 	int dpms_mode;
159 	bool active; /* is the crtc on? independent of the dpms mode */
160 	bool busy; /* is scanout buffer being updated frequently? */
161 	struct timer_list idle_timer;
162 	bool lowfreq_avail;
163 	struct intel_overlay *overlay;
164 	struct intel_unpin_work *unpin_work;
165 	int fdi_lanes;
166 
167 	struct drm_i915_gem_object *cursor_bo;
168 	uint32_t cursor_addr;
169 	int16_t cursor_x, cursor_y;
170 	int16_t cursor_width, cursor_height;
171 	bool cursor_visible;
172 	unsigned int bpp;
173 
174 	bool no_pll; /* tertiary pipe for IVB */
175 	bool use_pll_a;
176 };
177 
178 struct intel_plane {
179 	struct drm_plane base;
180 	enum pipe pipe;
181 	struct drm_i915_gem_object *obj;
182 	bool primary_disabled;
183 	int max_downscale;
184 	u32 lut_r[1024], lut_g[1024], lut_b[1024];
185 	void (*update_plane)(struct drm_plane *plane,
186 			     struct drm_framebuffer *fb,
187 			     struct drm_i915_gem_object *obj,
188 			     int crtc_x, int crtc_y,
189 			     unsigned int crtc_w, unsigned int crtc_h,
190 			     uint32_t x, uint32_t y,
191 			     uint32_t src_w, uint32_t src_h);
192 	void (*disable_plane)(struct drm_plane *plane);
193 	int (*update_colorkey)(struct drm_plane *plane,
194 			       struct drm_intel_sprite_colorkey *key);
195 	void (*get_colorkey)(struct drm_plane *plane,
196 			     struct drm_intel_sprite_colorkey *key);
197 };
198 
199 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
200 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
201 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
202 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
203 #define to_intel_plane(x) container_of(x, struct intel_plane, base)
204 
205 #define DIP_HEADER_SIZE	5
206 
207 #define DIP_TYPE_AVI    0x82
208 #define DIP_VERSION_AVI 0x2
209 #define DIP_LEN_AVI     13
210 
211 #define DIP_TYPE_SPD	0x83
212 #define DIP_VERSION_SPD	0x1
213 #define DIP_LEN_SPD	25
214 #define DIP_SPD_UNKNOWN	0
215 #define DIP_SPD_DSTB	0x1
216 #define DIP_SPD_DVDP	0x2
217 #define DIP_SPD_DVHS	0x3
218 #define DIP_SPD_HDDVR	0x4
219 #define DIP_SPD_DVC	0x5
220 #define DIP_SPD_DSC	0x6
221 #define DIP_SPD_VCD	0x7
222 #define DIP_SPD_GAME	0x8
223 #define DIP_SPD_PC	0x9
224 #define DIP_SPD_BD	0xa
225 #define DIP_SPD_SCD	0xb
226 
227 struct dip_infoframe {
228 	uint8_t type;		/* HB0 */
229 	uint8_t ver;		/* HB1 */
230 	uint8_t len;		/* HB2 - body len, not including checksum */
231 	uint8_t ecc;		/* Header ECC */
232 	uint8_t checksum;	/* PB0 */
233 	union {
234 		struct {
235 			/* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
236 			uint8_t Y_A_B_S;
237 			/* PB2 - C 7:6, M 5:4, R 3:0 */
238 			uint8_t C_M_R;
239 			/* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
240 			uint8_t ITC_EC_Q_SC;
241 			/* PB4 - VIC 6:0 */
242 			uint8_t VIC;
243 			/* PB5 - PR 3:0 */
244 			uint8_t PR;
245 			/* PB6 to PB13 */
246 			uint16_t top_bar_end;
247 			uint16_t bottom_bar_start;
248 			uint16_t left_bar_end;
249 			uint16_t right_bar_start;
250 		} __attribute__ ((packed)) avi;
251 		struct {
252 			uint8_t vn[8];
253 			uint8_t pd[16];
254 			uint8_t sdi;
255 		} __attribute__ ((packed)) spd;
256 		uint8_t payload[27];
257 	} __attribute__ ((packed)) body;
258 } __attribute__((packed));
259 
260 static inline struct drm_crtc *
intel_get_crtc_for_pipe(struct drm_device * dev,int pipe)261 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
262 {
263 	struct drm_i915_private *dev_priv = dev->dev_private;
264 	return dev_priv->pipe_to_crtc_mapping[pipe];
265 }
266 
267 static inline struct drm_crtc *
intel_get_crtc_for_plane(struct drm_device * dev,int plane)268 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
269 {
270 	struct drm_i915_private *dev_priv = dev->dev_private;
271 	return dev_priv->plane_to_crtc_mapping[plane];
272 }
273 
274 struct intel_unpin_work {
275 	struct work_struct work;
276 	struct drm_device *dev;
277 	struct drm_i915_gem_object *old_fb_obj;
278 	struct drm_i915_gem_object *pending_flip_obj;
279 	struct drm_pending_vblank_event *event;
280 	int pending;
281 	bool enable_stall_check;
282 };
283 
284 struct intel_fbc_work {
285 	struct delayed_work work;
286 	struct drm_crtc *crtc;
287 	struct drm_framebuffer *fb;
288 	int interval;
289 };
290 
291 int intel_connector_update_modes(struct drm_connector *connector,
292 				struct edid *edid);
293 int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
294 extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
295 
296 extern void intel_attach_force_audio_property(struct drm_connector *connector);
297 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
298 
299 extern void intel_crt_init(struct drm_device *dev);
300 extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
301 void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
302 extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
303 extern void intel_dvo_init(struct drm_device *dev);
304 extern void intel_tv_init(struct drm_device *dev);
305 extern void intel_mark_busy(struct drm_device *dev,
306 			    struct drm_i915_gem_object *obj);
307 extern bool intel_lvds_init(struct drm_device *dev);
308 extern void intel_dp_init(struct drm_device *dev, int dp_reg);
309 void
310 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
311 		 struct drm_display_mode *adjusted_mode);
312 extern bool intel_dpd_is_edp(struct drm_device *dev);
313 extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
314 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
315 extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
316 
317 /* intel_panel.c */
318 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
319 				   struct drm_display_mode *adjusted_mode);
320 extern void intel_pch_panel_fitting(struct drm_device *dev,
321 				    int fitting_mode,
322 				    struct drm_display_mode *mode,
323 				    struct drm_display_mode *adjusted_mode);
324 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
325 extern u32 intel_panel_get_backlight(struct drm_device *dev);
326 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
327 extern int intel_panel_setup_backlight(struct drm_device *dev);
328 extern void intel_panel_enable_backlight(struct drm_device *dev);
329 extern void intel_panel_disable_backlight(struct drm_device *dev);
330 extern void intel_panel_destroy_backlight(struct drm_device *dev);
331 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
332 
333 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
334 extern void intel_encoder_prepare(struct drm_encoder *encoder);
335 extern void intel_encoder_commit(struct drm_encoder *encoder);
336 extern void intel_encoder_destroy(struct drm_encoder *encoder);
337 
intel_attached_encoder(struct drm_connector * connector)338 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
339 {
340 	return to_intel_connector(connector)->encoder;
341 }
342 
343 extern void intel_connector_attach_encoder(struct intel_connector *connector,
344 					   struct intel_encoder *encoder);
345 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
346 
347 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
348 						    struct drm_crtc *crtc);
349 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
350 				struct drm_file *file_priv);
351 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
352 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
353 
354 struct intel_load_detect_pipe {
355 	struct drm_framebuffer *release_fb;
356 	bool load_detect_temp;
357 	int dpms_mode;
358 };
359 extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
360 				       struct drm_connector *connector,
361 				       struct drm_display_mode *mode,
362 				       struct intel_load_detect_pipe *old);
363 extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
364 					   struct drm_connector *connector,
365 					   struct intel_load_detect_pipe *old);
366 
367 extern void intelfb_restore(void);
368 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
369 				    u16 blue, int regno);
370 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
371 				    u16 *blue, int regno);
372 extern void intel_enable_clock_gating(struct drm_device *dev);
373 extern void ironlake_enable_drps(struct drm_device *dev);
374 extern void ironlake_disable_drps(struct drm_device *dev);
375 extern void gen6_enable_rps(struct drm_i915_private *dev_priv);
376 extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv);
377 extern void gen6_disable_rps(struct drm_device *dev);
378 extern void intel_init_emon(struct drm_device *dev);
379 
380 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
381 				      struct drm_i915_gem_object *obj,
382 				      struct intel_ring_buffer *pipelined);
383 extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
384 
385 extern int intel_framebuffer_init(struct drm_device *dev,
386 				  struct intel_framebuffer *ifb,
387 				  struct drm_mode_fb_cmd2 *mode_cmd,
388 				  struct drm_i915_gem_object *obj);
389 extern int intel_fbdev_init(struct drm_device *dev);
390 extern void intel_fbdev_fini(struct drm_device *dev);
391 extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
392 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
393 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
394 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
395 
396 extern void intel_setup_overlay(struct drm_device *dev);
397 extern void intel_cleanup_overlay(struct drm_device *dev);
398 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
399 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
400 				   struct drm_file *file_priv);
401 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
402 			       struct drm_file *file_priv);
403 
404 extern void intel_fb_output_poll_changed(struct drm_device *dev);
405 extern void intel_fb_restore_mode(struct drm_device *dev);
406 
407 extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
408 			bool state);
409 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
410 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
411 
412 extern void intel_init_clock_gating(struct drm_device *dev);
413 extern void intel_write_eld(struct drm_encoder *encoder,
414 			    struct drm_display_mode *mode);
415 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
416 
417 /* For use by IVB LP watermark workaround in intel_sprite.c */
418 extern void sandybridge_update_wm(struct drm_device *dev);
419 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
420 					   uint32_t sprite_width,
421 					   int pixel_size);
422 
423 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
424 				     struct drm_file *file_priv);
425 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
426 				     struct drm_file *file_priv);
427 
428 #endif /* __INTEL_DRV_H__ */
429