1 /*
2 * Corenet based SoC DS Setup
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2009-2011 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/pci.h>
16 #include <linux/kdev_t.h>
17 #include <linux/delay.h>
18 #include <linux/interrupt.h>
19 #include <linux/memblock.h>
20
21 #include <asm/time.h>
22 #include <asm/machdep.h>
23 #include <asm/pci-bridge.h>
24 #include <asm/ppc-pci.h>
25 #include <mm/mmu_decl.h>
26 #include <asm/prom.h>
27 #include <asm/udbg.h>
28 #include <asm/mpic.h>
29
30 #include <linux/of_platform.h>
31 #include <sysdev/fsl_soc.h>
32 #include <sysdev/fsl_pci.h>
33 #include "smp.h"
34
corenet_ds_pic_init(void)35 void __init corenet_ds_pic_init(void)
36 {
37 struct mpic *mpic;
38 unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
39 MPIC_NO_RESET;
40
41 if (ppc_md.get_irq == mpic_get_coreint_irq)
42 flags |= MPIC_ENABLE_COREINT;
43
44 mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC ");
45 BUG_ON(mpic == NULL);
46
47 mpic_init(mpic);
48 }
49
50 /*
51 * Setup the architecture
52 */
corenet_ds_setup_arch(void)53 void __init corenet_ds_setup_arch(void)
54 {
55 #ifdef CONFIG_PCI
56 struct device_node *np;
57 struct pci_controller *hose;
58 #endif
59 dma_addr_t max = 0xffffffff;
60
61 mpc85xx_smp_init();
62
63 #ifdef CONFIG_PCI
64 for_each_node_by_type(np, "pci") {
65 if (of_device_is_compatible(np, "fsl,p4080-pcie") ||
66 of_device_is_compatible(np, "fsl,qoriq-pcie-v2.2")) {
67 fsl_add_bridge(np, 0);
68 hose = pci_find_hose_for_OF_device(np);
69 max = min(max, hose->dma_window_base_cur +
70 hose->dma_window_size);
71 }
72 }
73
74 #ifdef CONFIG_PPC64
75 pci_devs_phb_init();
76 #endif
77 #endif
78
79 #ifdef CONFIG_SWIOTLB
80 if (memblock_end_of_DRAM() > max) {
81 ppc_swiotlb_enable = 1;
82 set_pci_dma_ops(&swiotlb_dma_ops);
83 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
84 }
85 #endif
86 pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
87 }
88
89 static const struct of_device_id of_device_ids[] __devinitconst = {
90 {
91 .compatible = "simple-bus"
92 },
93 {
94 .compatible = "fsl,srio",
95 },
96 {
97 .compatible = "fsl,p4080-pcie",
98 },
99 {
100 .compatible = "fsl,qoriq-pcie-v2.2",
101 },
102 /* The following two are for the Freescale hypervisor */
103 {
104 .name = "hypervisor",
105 },
106 {
107 .name = "handles",
108 },
109 {}
110 };
111
corenet_ds_publish_devices(void)112 int __init corenet_ds_publish_devices(void)
113 {
114 return of_platform_bus_probe(NULL, of_device_ids, NULL);
115 }
116