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1 /*
2  *  cx18 init/start/stop/exit stream functions
3  *
4  *  Derived from ivtv-streams.c
5  *
6  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
7  *  Copyright (C) 2008  Andy Walls <awalls@md.metrocast.net>
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; either version 2 of the License, or
12  *  (at your option) any later version.
13  *
14  *  This program is distributed in the hope that it will be useful,
15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *  GNU General Public License for more details.
18  *
19  *  You should have received a copy of the GNU General Public License
20  *  along with this program; if not, write to the Free Software
21  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22  *  02111-1307  USA
23  */
24 
25 #include "cx18-driver.h"
26 #include "cx18-io.h"
27 #include "cx18-fileops.h"
28 #include "cx18-mailbox.h"
29 #include "cx18-i2c.h"
30 #include "cx18-queue.h"
31 #include "cx18-ioctl.h"
32 #include "cx18-streams.h"
33 #include "cx18-cards.h"
34 #include "cx18-scb.h"
35 #include "cx18-dvb.h"
36 
37 #define CX18_DSP0_INTERRUPT_MASK     	0xd0004C
38 
39 static struct v4l2_file_operations cx18_v4l2_enc_fops = {
40 	.owner = THIS_MODULE,
41 	.read = cx18_v4l2_read,
42 	.open = cx18_v4l2_open,
43 	/* FIXME change to video_ioctl2 if serialization lock can be removed */
44 	.unlocked_ioctl = cx18_v4l2_ioctl,
45 	.release = cx18_v4l2_close,
46 	.poll = cx18_v4l2_enc_poll,
47 	.mmap = cx18_v4l2_mmap,
48 };
49 
50 /* offset from 0 to register ts v4l2 minors on */
51 #define CX18_V4L2_ENC_TS_OFFSET   16
52 /* offset from 0 to register pcm v4l2 minors on */
53 #define CX18_V4L2_ENC_PCM_OFFSET  24
54 /* offset from 0 to register yuv v4l2 minors on */
55 #define CX18_V4L2_ENC_YUV_OFFSET  32
56 
57 static struct {
58 	const char *name;
59 	int vfl_type;
60 	int num_offset;
61 	int dma;
62 	enum v4l2_buf_type buf_type;
63 } cx18_stream_info[] = {
64 	{	/* CX18_ENC_STREAM_TYPE_MPG */
65 		"encoder MPEG",
66 		VFL_TYPE_GRABBER, 0,
67 		PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
68 	},
69 	{	/* CX18_ENC_STREAM_TYPE_TS */
70 		"TS",
71 		VFL_TYPE_GRABBER, -1,
72 		PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
73 	},
74 	{	/* CX18_ENC_STREAM_TYPE_YUV */
75 		"encoder YUV",
76 		VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
77 		PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
78 	},
79 	{	/* CX18_ENC_STREAM_TYPE_VBI */
80 		"encoder VBI",
81 		VFL_TYPE_VBI, 0,
82 		PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE,
83 	},
84 	{	/* CX18_ENC_STREAM_TYPE_PCM */
85 		"encoder PCM audio",
86 		VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
87 		PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE,
88 	},
89 	{	/* CX18_ENC_STREAM_TYPE_IDX */
90 		"encoder IDX",
91 		VFL_TYPE_GRABBER, -1,
92 		PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
93 	},
94 	{	/* CX18_ENC_STREAM_TYPE_RAD */
95 		"encoder radio",
96 		VFL_TYPE_RADIO, 0,
97 		PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE,
98 	},
99 };
100 
101 
cx18_dma_free(struct videobuf_queue * q,struct cx18_stream * s,struct cx18_videobuf_buffer * buf)102 void cx18_dma_free(struct videobuf_queue *q,
103 	struct cx18_stream *s, struct cx18_videobuf_buffer *buf)
104 {
105 	videobuf_waiton(q, &buf->vb, 0, 0);
106 	videobuf_vmalloc_free(&buf->vb);
107 	buf->vb.state = VIDEOBUF_NEEDS_INIT;
108 }
109 
cx18_prepare_buffer(struct videobuf_queue * q,struct cx18_stream * s,struct cx18_videobuf_buffer * buf,u32 pixelformat,unsigned int width,unsigned int height,enum v4l2_field field)110 static int cx18_prepare_buffer(struct videobuf_queue *q,
111 	struct cx18_stream *s,
112 	struct cx18_videobuf_buffer *buf,
113 	u32 pixelformat,
114 	unsigned int width, unsigned int height,
115 	enum v4l2_field field)
116 {
117         struct cx18 *cx = s->cx;
118 	int rc = 0;
119 
120 	/* check settings */
121 	buf->bytes_used = 0;
122 
123 	if ((width  < 48) || (height < 32))
124 		return -EINVAL;
125 
126 	buf->vb.size = (width * height * 2);
127 	if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
128 		return -EINVAL;
129 
130 	/* alloc + fill struct (if changed) */
131 	if (buf->vb.width != width || buf->vb.height != height ||
132 	    buf->vb.field != field || s->pixelformat != pixelformat ||
133 	    buf->tvnorm != cx->std) {
134 
135 		buf->vb.width  = width;
136 		buf->vb.height = height;
137 		buf->vb.field  = field;
138 		buf->tvnorm    = cx->std;
139 		s->pixelformat = pixelformat;
140 
141 		/* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
142 		   UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
143 		if (s->pixelformat == V4L2_PIX_FMT_HM12)
144 			s->vb_bytes_per_frame = height * 720 * 3 / 2;
145 		else
146 			s->vb_bytes_per_frame = height * 720 * 2;
147 		cx18_dma_free(q, s, buf);
148 	}
149 
150 	if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
151 		return -EINVAL;
152 
153 	if (buf->vb.field == 0)
154 		buf->vb.field = V4L2_FIELD_INTERLACED;
155 
156 	if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
157 		buf->vb.width  = width;
158 		buf->vb.height = height;
159 		buf->vb.field  = field;
160 		buf->tvnorm    = cx->std;
161 		s->pixelformat = pixelformat;
162 
163 		/* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
164 		   UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
165 		if (s->pixelformat == V4L2_PIX_FMT_HM12)
166 			s->vb_bytes_per_frame = height * 720 * 3 / 2;
167 		else
168 			s->vb_bytes_per_frame = height * 720 * 2;
169 		rc = videobuf_iolock(q, &buf->vb, NULL);
170 		if (rc != 0)
171 			goto fail;
172 	}
173 	buf->vb.state = VIDEOBUF_PREPARED;
174 	return 0;
175 
176 fail:
177 	cx18_dma_free(q, s, buf);
178 	return rc;
179 
180 }
181 
182 /* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576)
183    1440 is a single line of 4:2:2 YUV at 720 luma samples wide
184 */
185 #define VB_MIN_BUFFERS 32
186 #define VB_MIN_BUFSIZE 4147200
187 
buffer_setup(struct videobuf_queue * q,unsigned int * count,unsigned int * size)188 static int buffer_setup(struct videobuf_queue *q,
189 	unsigned int *count, unsigned int *size)
190 {
191 	struct cx18_stream *s = q->priv_data;
192 	struct cx18 *cx = s->cx;
193 
194 	*size = 2 * cx->cxhdl.width * cx->cxhdl.height;
195 	if (*count == 0)
196 		*count = VB_MIN_BUFFERS;
197 
198 	while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE)
199 		(*count)--;
200 
201 	q->field = V4L2_FIELD_INTERLACED;
202 	q->last = V4L2_FIELD_INTERLACED;
203 
204 	return 0;
205 }
206 
buffer_prepare(struct videobuf_queue * q,struct videobuf_buffer * vb,enum v4l2_field field)207 static int buffer_prepare(struct videobuf_queue *q,
208 	struct videobuf_buffer *vb,
209 	enum v4l2_field field)
210 {
211 	struct cx18_videobuf_buffer *buf =
212 		container_of(vb, struct cx18_videobuf_buffer, vb);
213 	struct cx18_stream *s = q->priv_data;
214 	struct cx18 *cx = s->cx;
215 
216 	return cx18_prepare_buffer(q, s, buf, s->pixelformat,
217 		cx->cxhdl.width, cx->cxhdl.height, field);
218 }
219 
buffer_release(struct videobuf_queue * q,struct videobuf_buffer * vb)220 static void buffer_release(struct videobuf_queue *q,
221 	struct videobuf_buffer *vb)
222 {
223 	struct cx18_videobuf_buffer *buf =
224 		container_of(vb, struct cx18_videobuf_buffer, vb);
225 	struct cx18_stream *s = q->priv_data;
226 
227 	cx18_dma_free(q, s, buf);
228 }
229 
buffer_queue(struct videobuf_queue * q,struct videobuf_buffer * vb)230 static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
231 {
232 	struct cx18_videobuf_buffer *buf =
233 		container_of(vb, struct cx18_videobuf_buffer, vb);
234 	struct cx18_stream *s = q->priv_data;
235 
236 	buf->vb.state = VIDEOBUF_QUEUED;
237 
238 	list_add_tail(&buf->vb.queue, &s->vb_capture);
239 }
240 
241 static struct videobuf_queue_ops cx18_videobuf_qops = {
242 	.buf_setup    = buffer_setup,
243 	.buf_prepare  = buffer_prepare,
244 	.buf_queue    = buffer_queue,
245 	.buf_release  = buffer_release,
246 };
247 
cx18_stream_init(struct cx18 * cx,int type)248 static void cx18_stream_init(struct cx18 *cx, int type)
249 {
250 	struct cx18_stream *s = &cx->streams[type];
251 	struct video_device *video_dev = s->video_dev;
252 
253 	/* we need to keep video_dev, so restore it afterwards */
254 	memset(s, 0, sizeof(*s));
255 	s->video_dev = video_dev;
256 
257 	/* initialize cx18_stream fields */
258 	s->dvb = NULL;
259 	s->cx = cx;
260 	s->type = type;
261 	s->name = cx18_stream_info[type].name;
262 	s->handle = CX18_INVALID_TASK_HANDLE;
263 
264 	s->dma = cx18_stream_info[type].dma;
265 	s->buffers = cx->stream_buffers[type];
266 	s->buf_size = cx->stream_buf_size[type];
267 	INIT_LIST_HEAD(&s->buf_pool);
268 	s->bufs_per_mdl = 1;
269 	s->mdl_size = s->buf_size * s->bufs_per_mdl;
270 
271 	init_waitqueue_head(&s->waitq);
272 	s->id = -1;
273 	spin_lock_init(&s->q_free.lock);
274 	cx18_queue_init(&s->q_free);
275 	spin_lock_init(&s->q_busy.lock);
276 	cx18_queue_init(&s->q_busy);
277 	spin_lock_init(&s->q_full.lock);
278 	cx18_queue_init(&s->q_full);
279 	spin_lock_init(&s->q_idle.lock);
280 	cx18_queue_init(&s->q_idle);
281 
282 	INIT_WORK(&s->out_work_order, cx18_out_work_handler);
283 
284 	INIT_LIST_HEAD(&s->vb_capture);
285 	s->vb_timeout.function = cx18_vb_timeout;
286 	s->vb_timeout.data = (unsigned long)s;
287 	init_timer(&s->vb_timeout);
288 	spin_lock_init(&s->vb_lock);
289 	if (type == CX18_ENC_STREAM_TYPE_YUV) {
290 		spin_lock_init(&s->vbuf_q_lock);
291 
292 		s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
293 		videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops,
294 			&cx->pci_dev->dev, &s->vbuf_q_lock,
295 			V4L2_BUF_TYPE_VIDEO_CAPTURE,
296 			V4L2_FIELD_INTERLACED,
297 			sizeof(struct cx18_videobuf_buffer),
298 			s, &cx->serialize_lock);
299 
300 		/* Assume the previous pixel default */
301 		s->pixelformat = V4L2_PIX_FMT_HM12;
302 		s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2;
303 	}
304 }
305 
cx18_prep_dev(struct cx18 * cx,int type)306 static int cx18_prep_dev(struct cx18 *cx, int type)
307 {
308 	struct cx18_stream *s = &cx->streams[type];
309 	u32 cap = cx->v4l2_cap;
310 	int num_offset = cx18_stream_info[type].num_offset;
311 	int num = cx->instance + cx18_first_minor + num_offset;
312 
313 	/*
314 	 * These five fields are always initialized.
315 	 * For analog capture related streams, if video_dev == NULL then the
316 	 * stream is not in use.
317 	 * For the TS stream, if dvb == NULL then the stream is not in use.
318 	 * In those cases no other fields but these four can be used.
319 	 */
320 	s->video_dev = NULL;
321 	s->dvb = NULL;
322 	s->cx = cx;
323 	s->type = type;
324 	s->name = cx18_stream_info[type].name;
325 
326 	/* Check whether the radio is supported */
327 	if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
328 		return 0;
329 
330 	/* Check whether VBI is supported */
331 	if (type == CX18_ENC_STREAM_TYPE_VBI &&
332 	    !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
333 		return 0;
334 
335 	/* User explicitly selected 0 buffers for these streams, so don't
336 	   create them. */
337 	if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
338 	    cx->stream_buffers[type] == 0) {
339 		CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
340 		return 0;
341 	}
342 
343 	cx18_stream_init(cx, type);
344 
345 	/* Allocate the cx18_dvb struct only for the TS on cards with DTV */
346 	if (type == CX18_ENC_STREAM_TYPE_TS) {
347 		if (cx->card->hw_all & CX18_HW_DVB) {
348 			s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
349 			if (s->dvb == NULL) {
350 				CX18_ERR("Couldn't allocate cx18_dvb structure"
351 					 " for %s\n", s->name);
352 				return -ENOMEM;
353 			}
354 		} else {
355 			/* Don't need buffers for the TS, if there is no DVB */
356 			s->buffers = 0;
357 		}
358 	}
359 
360 	if (num_offset == -1)
361 		return 0;
362 
363 	/* allocate and initialize the v4l2 video device structure */
364 	s->video_dev = video_device_alloc();
365 	if (s->video_dev == NULL) {
366 		CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
367 				s->name);
368 		return -ENOMEM;
369 	}
370 
371 	snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
372 		 cx->v4l2_dev.name, s->name);
373 
374 	s->video_dev->num = num;
375 	s->video_dev->v4l2_dev = &cx->v4l2_dev;
376 	s->video_dev->fops = &cx18_v4l2_enc_fops;
377 	s->video_dev->release = video_device_release;
378 	s->video_dev->tvnorms = V4L2_STD_ALL;
379 	set_bit(V4L2_FL_USE_FH_PRIO, &s->video_dev->flags);
380 	cx18_set_funcs(s->video_dev);
381 	return 0;
382 }
383 
384 /* Initialize v4l2 variables and register v4l2 devices */
cx18_streams_setup(struct cx18 * cx)385 int cx18_streams_setup(struct cx18 *cx)
386 {
387 	int type, ret;
388 
389 	/* Setup V4L2 Devices */
390 	for (type = 0; type < CX18_MAX_STREAMS; type++) {
391 		/* Prepare device */
392 		ret = cx18_prep_dev(cx, type);
393 		if (ret < 0)
394 			break;
395 
396 		/* Allocate Stream */
397 		ret = cx18_stream_alloc(&cx->streams[type]);
398 		if (ret < 0)
399 			break;
400 	}
401 	if (type == CX18_MAX_STREAMS)
402 		return 0;
403 
404 	/* One or more streams could not be initialized. Clean 'em all up. */
405 	cx18_streams_cleanup(cx, 0);
406 	return ret;
407 }
408 
cx18_reg_dev(struct cx18 * cx,int type)409 static int cx18_reg_dev(struct cx18 *cx, int type)
410 {
411 	struct cx18_stream *s = &cx->streams[type];
412 	int vfl_type = cx18_stream_info[type].vfl_type;
413 	const char *name;
414 	int num, ret;
415 
416 	if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
417 		ret = cx18_dvb_register(s);
418 		if (ret < 0) {
419 			CX18_ERR("DVB failed to register\n");
420 			return ret;
421 		}
422 	}
423 
424 	if (s->video_dev == NULL)
425 		return 0;
426 
427 	num = s->video_dev->num;
428 	/* card number + user defined offset + device offset */
429 	if (type != CX18_ENC_STREAM_TYPE_MPG) {
430 		struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
431 
432 		if (s_mpg->video_dev)
433 			num = s_mpg->video_dev->num
434 			    + cx18_stream_info[type].num_offset;
435 	}
436 	video_set_drvdata(s->video_dev, s);
437 
438 	/* Register device. First try the desired minor, then any free one. */
439 	ret = video_register_device_no_warn(s->video_dev, vfl_type, num);
440 	if (ret < 0) {
441 		CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
442 			s->name, num);
443 		video_device_release(s->video_dev);
444 		s->video_dev = NULL;
445 		return ret;
446 	}
447 
448 	name = video_device_node_name(s->video_dev);
449 
450 	switch (vfl_type) {
451 	case VFL_TYPE_GRABBER:
452 		CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
453 			  name, s->name, cx->stream_buffers[type],
454 			  cx->stream_buf_size[type] / 1024,
455 			  (cx->stream_buf_size[type] * 100 / 1024) % 100);
456 		break;
457 
458 	case VFL_TYPE_RADIO:
459 		CX18_INFO("Registered device %s for %s\n", name, s->name);
460 		break;
461 
462 	case VFL_TYPE_VBI:
463 		if (cx->stream_buffers[type])
464 			CX18_INFO("Registered device %s for %s "
465 				  "(%d x %d bytes)\n",
466 				  name, s->name, cx->stream_buffers[type],
467 				  cx->stream_buf_size[type]);
468 		else
469 			CX18_INFO("Registered device %s for %s\n",
470 				name, s->name);
471 		break;
472 	}
473 
474 	return 0;
475 }
476 
477 /* Register v4l2 devices */
cx18_streams_register(struct cx18 * cx)478 int cx18_streams_register(struct cx18 *cx)
479 {
480 	int type;
481 	int err;
482 	int ret = 0;
483 
484 	/* Register V4L2 devices */
485 	for (type = 0; type < CX18_MAX_STREAMS; type++) {
486 		err = cx18_reg_dev(cx, type);
487 		if (err && ret == 0)
488 			ret = err;
489 	}
490 
491 	if (ret == 0)
492 		return 0;
493 
494 	/* One or more streams could not be initialized. Clean 'em all up. */
495 	cx18_streams_cleanup(cx, 1);
496 	return ret;
497 }
498 
499 /* Unregister v4l2 devices */
cx18_streams_cleanup(struct cx18 * cx,int unregister)500 void cx18_streams_cleanup(struct cx18 *cx, int unregister)
501 {
502 	struct video_device *vdev;
503 	int type;
504 
505 	/* Teardown all streams */
506 	for (type = 0; type < CX18_MAX_STREAMS; type++) {
507 
508 		/* The TS has a cx18_dvb structure, not a video_device */
509 		if (type == CX18_ENC_STREAM_TYPE_TS) {
510 			if (cx->streams[type].dvb != NULL) {
511 				if (unregister)
512 					cx18_dvb_unregister(&cx->streams[type]);
513 				kfree(cx->streams[type].dvb);
514 				cx->streams[type].dvb = NULL;
515 				cx18_stream_free(&cx->streams[type]);
516 			}
517 			continue;
518 		}
519 
520 		/* No struct video_device, but can have buffers allocated */
521 		if (type == CX18_ENC_STREAM_TYPE_IDX) {
522 			/* If the module params didn't inhibit IDX ... */
523 			if (cx->stream_buffers[type] != 0) {
524 				cx->stream_buffers[type] = 0;
525 				/*
526 				 * Before calling cx18_stream_free(),
527 				 * check if the IDX stream was actually set up.
528 				 * Needed, since the cx18_probe() error path
529 				 * exits through here as well as normal clean up
530 				 */
531 				if (cx->streams[type].buffers != 0)
532 					cx18_stream_free(&cx->streams[type]);
533 			}
534 			continue;
535 		}
536 
537 		/* If struct video_device exists, can have buffers allocated */
538 		vdev = cx->streams[type].video_dev;
539 
540 		cx->streams[type].video_dev = NULL;
541 		if (vdev == NULL)
542 			continue;
543 
544 		if (type == CX18_ENC_STREAM_TYPE_YUV)
545 			videobuf_mmap_free(&cx->streams[type].vbuf_q);
546 
547 		cx18_stream_free(&cx->streams[type]);
548 
549 		/* Unregister or release device */
550 		if (unregister)
551 			video_unregister_device(vdev);
552 		else
553 			video_device_release(vdev);
554 	}
555 }
556 
cx18_vbi_setup(struct cx18_stream * s)557 static void cx18_vbi_setup(struct cx18_stream *s)
558 {
559 	struct cx18 *cx = s->cx;
560 	int raw = cx18_raw_vbi(cx);
561 	u32 data[CX2341X_MBOX_MAX_DATA];
562 	int lines;
563 
564 	if (cx->is_60hz) {
565 		cx->vbi.count = 12;
566 		cx->vbi.start[0] = 10;
567 		cx->vbi.start[1] = 273;
568 	} else {        /* PAL/SECAM */
569 		cx->vbi.count = 18;
570 		cx->vbi.start[0] = 6;
571 		cx->vbi.start[1] = 318;
572 	}
573 
574 	/* setup VBI registers */
575 	if (raw)
576 		v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
577 	else
578 		v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
579 
580 	/*
581 	 * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
582 	 * VBI when the first analog capture channel starts, as once it starts
583 	 * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
584 	 * (i.e. for the VBI capture channels).  We also send it for each
585 	 * analog capture channel anyway just to make sure we get the proper
586 	 * behavior
587 	 */
588 	if (raw) {
589 		lines = cx->vbi.count * 2;
590 	} else {
591 		/*
592 		 * For 525/60 systems, according to the VIP 2 & BT.656 std:
593 		 * The EAV RP code's Field bit toggles on line 4, a few lines
594 		 * after the Vertcal Blank bit has already toggled.
595 		 * Tell the encoder to capture 21-4+1=18 lines per field,
596 		 * since we want lines 10 through 21.
597 		 *
598 		 * For 625/50 systems, according to the VIP 2 & BT.656 std:
599 		 * The EAV RP code's Field bit toggles on line 1, a few lines
600 		 * after the Vertcal Blank bit has already toggled.
601 		 * (We've actually set the digitizer so that the Field bit
602 		 * toggles on line 2.) Tell the encoder to capture 23-2+1=22
603 		 * lines per field, since we want lines 6 through 23.
604 		 */
605 		lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
606 	}
607 
608 	data[0] = s->handle;
609 	/* Lines per field */
610 	data[1] = (lines / 2) | ((lines / 2) << 16);
611 	/* bytes per line */
612 	data[2] = (raw ? vbi_active_samples
613 		       : (cx->is_60hz ? vbi_hblank_samples_60Hz
614 				      : vbi_hblank_samples_50Hz));
615 	/* Every X number of frames a VBI interrupt arrives
616 	   (frames as in 25 or 30 fps) */
617 	data[3] = 1;
618 	/*
619 	 * Set the SAV/EAV RP codes to look for as start/stop points
620 	 * when in VIP-1.1 mode
621 	 */
622 	if (raw) {
623 		/*
624 		 * Start codes for beginning of "active" line in vertical blank
625 		 * 0x20 (               VerticalBlank                )
626 		 * 0x60 (     EvenField VerticalBlank                )
627 		 */
628 		data[4] = 0x20602060;
629 		/*
630 		 * End codes for end of "active" raw lines and regular lines
631 		 * 0x30 (               VerticalBlank HorizontalBlank)
632 		 * 0x70 (     EvenField VerticalBlank HorizontalBlank)
633 		 * 0x90 (Task                         HorizontalBlank)
634 		 * 0xd0 (Task EvenField               HorizontalBlank)
635 		 */
636 		data[5] = 0x307090d0;
637 	} else {
638 		/*
639 		 * End codes for active video, we want data in the hblank region
640 		 * 0xb0 (Task         0 VerticalBlank HorizontalBlank)
641 		 * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
642 		 *
643 		 * Since the V bit is only allowed to toggle in the EAV RP code,
644 		 * just before the first active region line, these two
645 		 * are problematic:
646 		 * 0x90 (Task                         HorizontalBlank)
647 		 * 0xd0 (Task EvenField               HorizontalBlank)
648 		 *
649 		 * We have set the digitzer such that we don't have to worry
650 		 * about these problem codes.
651 		 */
652 		data[4] = 0xB0F0B0F0;
653 		/*
654 		 * Start codes for beginning of active line in vertical blank
655 		 * 0xa0 (Task           VerticalBlank                )
656 		 * 0xe0 (Task EvenField VerticalBlank                )
657 		 */
658 		data[5] = 0xA0E0A0E0;
659 	}
660 
661 	CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
662 			data[0], data[1], data[2], data[3], data[4], data[5]);
663 
664 	cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
665 }
666 
cx18_stream_rotate_idx_mdls(struct cx18 * cx)667 void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
668 {
669 	struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
670 	struct cx18_mdl *mdl;
671 
672 	if (!cx18_stream_enabled(s))
673 		return;
674 
675 	/* Return if the firmware is not running low on MDLs */
676 	if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
677 					    CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
678 		return;
679 
680 	/* Return if there are no MDLs to rotate back to the firmware */
681 	if (atomic_read(&s->q_full.depth) < 2)
682 		return;
683 
684 	/*
685 	 * Take the oldest IDX MDL still holding data, and discard its index
686 	 * entries by scheduling the MDL to go back to the firmware
687 	 */
688 	mdl = cx18_dequeue(s, &s->q_full);
689 	if (mdl != NULL)
690 		cx18_enqueue(s, mdl, &s->q_free);
691 }
692 
693 static
_cx18_stream_put_mdl_fw(struct cx18_stream * s,struct cx18_mdl * mdl)694 struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
695 					   struct cx18_mdl *mdl)
696 {
697 	struct cx18 *cx = s->cx;
698 	struct cx18_queue *q;
699 
700 	/* Don't give it to the firmware, if we're not running a capture */
701 	if (s->handle == CX18_INVALID_TASK_HANDLE ||
702 	    test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
703 	    !test_bit(CX18_F_S_STREAMING, &s->s_flags))
704 		return cx18_enqueue(s, mdl, &s->q_free);
705 
706 	q = cx18_enqueue(s, mdl, &s->q_busy);
707 	if (q != &s->q_busy)
708 		return q; /* The firmware has the max MDLs it can handle */
709 
710 	cx18_mdl_sync_for_device(s, mdl);
711 	cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
712 		  (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
713 		  s->bufs_per_mdl, mdl->id, s->mdl_size);
714 	return q;
715 }
716 
717 static
_cx18_stream_load_fw_queue(struct cx18_stream * s)718 void _cx18_stream_load_fw_queue(struct cx18_stream *s)
719 {
720 	struct cx18_queue *q;
721 	struct cx18_mdl *mdl;
722 
723 	if (atomic_read(&s->q_free.depth) == 0 ||
724 	    atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
725 		return;
726 
727 	/* Move from q_free to q_busy notifying the firmware, until the limit */
728 	do {
729 		mdl = cx18_dequeue(s, &s->q_free);
730 		if (mdl == NULL)
731 			break;
732 		q = _cx18_stream_put_mdl_fw(s, mdl);
733 	} while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
734 		 && q == &s->q_busy);
735 }
736 
cx18_out_work_handler(struct work_struct * work)737 void cx18_out_work_handler(struct work_struct *work)
738 {
739 	struct cx18_stream *s =
740 			 container_of(work, struct cx18_stream, out_work_order);
741 
742 	_cx18_stream_load_fw_queue(s);
743 }
744 
cx18_stream_configure_mdls(struct cx18_stream * s)745 static void cx18_stream_configure_mdls(struct cx18_stream *s)
746 {
747 	cx18_unload_queues(s);
748 
749 	switch (s->type) {
750 	case CX18_ENC_STREAM_TYPE_YUV:
751 		/*
752 		 * Height should be a multiple of 32 lines.
753 		 * Set the MDL size to the exact size needed for one frame.
754 		 * Use enough buffers per MDL to cover the MDL size
755 		 */
756 		if (s->pixelformat == V4L2_PIX_FMT_HM12)
757 			s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
758 		else
759 			s->mdl_size = 720 * s->cx->cxhdl.height * 2;
760 		s->bufs_per_mdl = s->mdl_size / s->buf_size;
761 		if (s->mdl_size % s->buf_size)
762 			s->bufs_per_mdl++;
763 		break;
764 	case CX18_ENC_STREAM_TYPE_VBI:
765 		s->bufs_per_mdl = 1;
766 		if  (cx18_raw_vbi(s->cx)) {
767 			s->mdl_size = (s->cx->is_60hz ? 12 : 18)
768 						       * 2 * vbi_active_samples;
769 		} else {
770 			/*
771 			 * See comment in cx18_vbi_setup() below about the
772 			 * extra lines we capture in sliced VBI mode due to
773 			 * the lines on which EAV RP codes toggle.
774 			*/
775 			s->mdl_size = s->cx->is_60hz
776 				   ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
777 				   : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz;
778 		}
779 		break;
780 	default:
781 		s->bufs_per_mdl = 1;
782 		s->mdl_size = s->buf_size * s->bufs_per_mdl;
783 		break;
784 	}
785 
786 	cx18_load_queues(s);
787 }
788 
cx18_start_v4l2_encode_stream(struct cx18_stream * s)789 int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
790 {
791 	u32 data[MAX_MB_ARGUMENTS];
792 	struct cx18 *cx = s->cx;
793 	int captype = 0;
794 	struct cx18_stream *s_idx;
795 
796 	if (!cx18_stream_enabled(s))
797 		return -EINVAL;
798 
799 	CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
800 
801 	switch (s->type) {
802 	case CX18_ENC_STREAM_TYPE_MPG:
803 		captype = CAPTURE_CHANNEL_TYPE_MPEG;
804 		cx->mpg_data_received = cx->vbi_data_inserted = 0;
805 		cx->dualwatch_jiffies = jiffies;
806 		cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
807 		cx->search_pack_header = 0;
808 		break;
809 
810 	case CX18_ENC_STREAM_TYPE_IDX:
811 		captype = CAPTURE_CHANNEL_TYPE_INDEX;
812 		break;
813 	case CX18_ENC_STREAM_TYPE_TS:
814 		captype = CAPTURE_CHANNEL_TYPE_TS;
815 		break;
816 	case CX18_ENC_STREAM_TYPE_YUV:
817 		captype = CAPTURE_CHANNEL_TYPE_YUV;
818 		break;
819 	case CX18_ENC_STREAM_TYPE_PCM:
820 		captype = CAPTURE_CHANNEL_TYPE_PCM;
821 		break;
822 	case CX18_ENC_STREAM_TYPE_VBI:
823 #ifdef CX18_ENCODER_PARSES_SLICED
824 		captype = cx18_raw_vbi(cx) ?
825 		     CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
826 #else
827 		/*
828 		 * Currently we set things up so that Sliced VBI from the
829 		 * digitizer is handled as Raw VBI by the encoder
830 		 */
831 		captype = CAPTURE_CHANNEL_TYPE_VBI;
832 #endif
833 		cx->vbi.frame = 0;
834 		cx->vbi.inserted_frame = 0;
835 		memset(cx->vbi.sliced_mpeg_size,
836 			0, sizeof(cx->vbi.sliced_mpeg_size));
837 		break;
838 	default:
839 		return -EINVAL;
840 	}
841 
842 	/* Clear Streamoff flags in case left from last capture */
843 	clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
844 
845 	cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
846 	s->handle = data[0];
847 	cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
848 
849 	/*
850 	 * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
851 	 * set up all the parameters, as it is not obvious which parameters the
852 	 * firmware shares across capture channel types and which it does not.
853 	 *
854 	 * Some of the cx18_vapi() calls below apply to only certain capture
855 	 * channel types.  We're hoping there's no harm in calling most of them
856 	 * anyway, as long as the values are all consistent.  Setting some
857 	 * shared parameters will have no effect once an analog capture channel
858 	 * has started streaming.
859 	 */
860 	if (captype != CAPTURE_CHANNEL_TYPE_TS) {
861 		cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
862 		cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
863 		cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
864 		cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
865 
866 		/*
867 		 * Audio related reset according to
868 		 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
869 		 */
870 		if (atomic_read(&cx->ana_capturing) == 0)
871 			cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
872 				  s->handle, 12);
873 
874 		/*
875 		 * Number of lines for Field 1 & Field 2 according to
876 		 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
877 		 * Field 1 is 312 for 625 line systems in BT.656
878 		 * Field 2 is 313 for 625 line systems in BT.656
879 		 */
880 		cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
881 			  s->handle, 312, 313);
882 
883 		if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
884 			cx18_vbi_setup(s);
885 
886 		/*
887 		 * Select to receive I, P, and B frame index entries, if the
888 		 * index stream is enabled.  Otherwise disable index entry
889 		 * generation.
890 		 */
891 		s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
892 		cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
893 				 s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
894 
895 		/* Call out to the common CX2341x API setup for user controls */
896 		cx->cxhdl.priv = s;
897 		cx2341x_handler_setup(&cx->cxhdl);
898 
899 		/*
900 		 * When starting a capture and we're set for radio,
901 		 * ensure the video is muted, despite the user control.
902 		 */
903 		if (!cx->cxhdl.video_mute &&
904 		    test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
905 			cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
906 			  (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
907 
908 		/* Enable the Video Format Converter for UYVY 4:2:2 support,
909 		 * rather than the default HM12 Macroblovk 4:2:0 support.
910 		 */
911 		if (captype == CAPTURE_CHANNEL_TYPE_YUV) {
912 			if (s->pixelformat == V4L2_PIX_FMT_UYVY)
913 				cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
914 					s->handle, 1);
915 			else
916 				/* If in doubt, default to HM12 */
917 				cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
918 					s->handle, 0);
919 		}
920 	}
921 
922 	if (atomic_read(&cx->tot_capturing) == 0) {
923 		cx2341x_handler_set_busy(&cx->cxhdl, 1);
924 		clear_bit(CX18_F_I_EOS, &cx->i_flags);
925 		cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
926 	}
927 
928 	cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
929 		(void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
930 		(void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
931 
932 	/* Init all the cpu_mdls for this stream */
933 	cx18_stream_configure_mdls(s);
934 	_cx18_stream_load_fw_queue(s);
935 
936 	/* begin_capture */
937 	if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
938 		CX18_DEBUG_WARN("Error starting capture!\n");
939 		/* Ensure we're really not capturing before releasing MDLs */
940 		set_bit(CX18_F_S_STOPPING, &s->s_flags);
941 		if (s->type == CX18_ENC_STREAM_TYPE_MPG)
942 			cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
943 		else
944 			cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
945 		clear_bit(CX18_F_S_STREAMING, &s->s_flags);
946 		/* FIXME - CX18_F_S_STREAMOFF as well? */
947 		cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
948 		cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
949 		s->handle = CX18_INVALID_TASK_HANDLE;
950 		clear_bit(CX18_F_S_STOPPING, &s->s_flags);
951 		if (atomic_read(&cx->tot_capturing) == 0) {
952 			set_bit(CX18_F_I_EOS, &cx->i_flags);
953 			cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
954 		}
955 		return -EINVAL;
956 	}
957 
958 	/* you're live! sit back and await interrupts :) */
959 	if (captype != CAPTURE_CHANNEL_TYPE_TS)
960 		atomic_inc(&cx->ana_capturing);
961 	atomic_inc(&cx->tot_capturing);
962 	return 0;
963 }
964 EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
965 
cx18_stop_all_captures(struct cx18 * cx)966 void cx18_stop_all_captures(struct cx18 *cx)
967 {
968 	int i;
969 
970 	for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
971 		struct cx18_stream *s = &cx->streams[i];
972 
973 		if (!cx18_stream_enabled(s))
974 			continue;
975 		if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
976 			cx18_stop_v4l2_encode_stream(s, 0);
977 	}
978 }
979 
cx18_stop_v4l2_encode_stream(struct cx18_stream * s,int gop_end)980 int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
981 {
982 	struct cx18 *cx = s->cx;
983 	unsigned long then;
984 
985 	if (!cx18_stream_enabled(s))
986 		return -EINVAL;
987 
988 	/* This function assumes that you are allowed to stop the capture
989 	   and that we are actually capturing */
990 
991 	CX18_DEBUG_INFO("Stop Capture\n");
992 
993 	if (atomic_read(&cx->tot_capturing) == 0)
994 		return 0;
995 
996 	set_bit(CX18_F_S_STOPPING, &s->s_flags);
997 	if (s->type == CX18_ENC_STREAM_TYPE_MPG)
998 		cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
999 	else
1000 		cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
1001 
1002 	then = jiffies;
1003 
1004 	if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
1005 		CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
1006 	}
1007 
1008 	if (s->type != CX18_ENC_STREAM_TYPE_TS)
1009 		atomic_dec(&cx->ana_capturing);
1010 	atomic_dec(&cx->tot_capturing);
1011 
1012 	/* Clear capture and no-read bits */
1013 	clear_bit(CX18_F_S_STREAMING, &s->s_flags);
1014 
1015 	/* Tell the CX23418 it can't use our buffers anymore */
1016 	cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
1017 
1018 	cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
1019 	s->handle = CX18_INVALID_TASK_HANDLE;
1020 	clear_bit(CX18_F_S_STOPPING, &s->s_flags);
1021 
1022 	if (atomic_read(&cx->tot_capturing) > 0)
1023 		return 0;
1024 
1025 	cx2341x_handler_set_busy(&cx->cxhdl, 0);
1026 	cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
1027 	wake_up(&s->waitq);
1028 
1029 	return 0;
1030 }
1031 EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
1032 
cx18_find_handle(struct cx18 * cx)1033 u32 cx18_find_handle(struct cx18 *cx)
1034 {
1035 	int i;
1036 
1037 	/* find first available handle to be used for global settings */
1038 	for (i = 0; i < CX18_MAX_STREAMS; i++) {
1039 		struct cx18_stream *s = &cx->streams[i];
1040 
1041 		if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
1042 			return s->handle;
1043 	}
1044 	return CX18_INVALID_TASK_HANDLE;
1045 }
1046 
cx18_handle_to_stream(struct cx18 * cx,u32 handle)1047 struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
1048 {
1049 	int i;
1050 	struct cx18_stream *s;
1051 
1052 	if (handle == CX18_INVALID_TASK_HANDLE)
1053 		return NULL;
1054 
1055 	for (i = 0; i < CX18_MAX_STREAMS; i++) {
1056 		s = &cx->streams[i];
1057 		if (s->handle != handle)
1058 			continue;
1059 		if (cx18_stream_enabled(s))
1060 			return s;
1061 	}
1062 	return NULL;
1063 }
1064