1/* 2 * linux/arch/unicore32/mm/proc-macros.S 3 * 4 * Code specific to PKUnity SoC and UniCore ISA 5 * 6 * Copyright (C) 2001-2010 GUAN Xue-tao 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * We need constants.h for: 13 * VMA_VM_MM 14 * VMA_VM_FLAGS 15 * VM_EXEC 16 */ 17#include <generated/asm-offsets.h> 18#include <asm/thread_info.h> 19#include <asm/memory.h> 20 21/* 22 * the cache line sizes of the I and D cache are the same 23 */ 24#define CACHE_LINESIZE 32 25 26/* 27 * This is the maximum size of an area which will be invalidated 28 * using the single invalidate entry instructions. Anything larger 29 * than this, and we go for the whole cache. 30 * 31 * This value should be chosen such that we choose the cheapest 32 * alternative. 33 */ 34#ifdef CONFIG_CPU_UCV2 35#define MAX_AREA_SIZE 0x800 /* 64 cache line */ 36#endif 37 38/* 39 * vma_vm_mm - get mm pointer from vma pointer (vma->vm_mm) 40 */ 41 .macro vma_vm_mm, rd, rn 42 ldw \rd, [\rn+], #VMA_VM_MM 43 .endm 44 45/* 46 * vma_vm_flags - get vma->vm_flags 47 */ 48 .macro vma_vm_flags, rd, rn 49 ldw \rd, [\rn+], #VMA_VM_FLAGS 50 .endm 51 52 .macro tsk_mm, rd, rn 53 ldw \rd, [\rn+], #TI_TASK 54 ldw \rd, [\rd+], #TSK_ACTIVE_MM 55 .endm 56 57/* 58 * act_mm - get current->active_mm 59 */ 60 .macro act_mm, rd 61 andn \rd, sp, #8128 62 andn \rd, \rd, #63 63 ldw \rd, [\rd+], #TI_TASK 64 ldw \rd, [\rd+], #TSK_ACTIVE_MM 65 .endm 66 67/* 68 * mmid - get context id from mm pointer (mm->context.id) 69 */ 70 .macro mmid, rd, rn 71 ldw \rd, [\rn+], #MM_CONTEXT_ID 72 .endm 73 74/* 75 * mask_asid - mask the ASID from the context ID 76 */ 77 .macro asid, rd, rn 78 and \rd, \rn, #255 79 .endm 80 81 .macro crval, clear, mmuset, ucset 82 .word \clear 83 .word \mmuset 84 .endm 85 86#ifndef CONFIG_CPU_DCACHE_LINE_DISABLE 87/* 88 * va2pa va, pa, tbl, msk, off, err 89 * This macro is used to translate virtual address to its physical address. 90 * 91 * va: virtual address 92 * pa: physical address, result is stored in this register 93 * tbl, msk, off: temp registers, will be destroyed 94 * err: jump to error label if the physical address not exist 95 * NOTE: all regs must be different 96 */ 97 .macro va2pa, va, pa, tbl, msk, off, err=990f 98 movc \pa, p0.c2, #0 99 mov \off, \va >> #22 @ off <- index of 1st page table 100 adr \tbl, 910f @ tbl <- table of 1st page table 101900: @ ---- handle 1, 2 page table 102 add \pa, \pa, #PAGE_OFFSET @ pa <- virt addr of page table 103 ldw \pa, [\pa+], \off << #2 @ pa <- the content of pt 104 cand.a \pa, #4 @ test exist bit 105 beq \err @ if not exist 106 and \off, \pa, #3 @ off <- the last 2 bits 107 add \tbl, \tbl, \off << #3 @ cmove table pointer 108 ldw \msk, [\tbl+], #0 @ get the mask 109 ldw pc, [\tbl+], #4 110930: @ ---- handle 2nd page table 111 and \pa, \pa, \msk @ pa <- phys addr of 2nd pt 112 mov \off, \va << #10 113 cntlo \tbl, \msk @ use tbl as temp reg 114 mov \off, \off >> \tbl 115 mov \off, \off >> #2 @ off <- index of 2nd pt 116 adr \tbl, 920f @ tbl <- table of 2nd pt 117 b 900b 118910: @ 1st level page table 119 .word 0xfffff000, 930b @ second level page table 120 .word 0xfffffc00, 930b @ second level large page table 121 .word 0x00000000, \err @ invalid 122 .word 0xffc00000, 980f @ super page 123 124920: @ 2nd level page table 125 .word 0xfffff000, 980f @ page 126 .word 0xffffc000, 980f @ middle page 127 .word 0xffff0000, 980f @ large page 128 .word 0x00000000, \err @ invalid 129980: 130 andn \tbl, \va, \msk 131 and \pa, \pa, \msk 132 or \pa, \pa, \tbl 133990: 134 .endm 135#endif 136 137 .macro dcacheline_flush, addr, t1, t2 138 mov \t1, \addr << #20 139 ldw \t2, =_stext @ _stext must ALIGN(4096) 140 add \t2, \t2, \t1 >> #20 141 ldw \t1, [\t2+], #0x0000 142 ldw \t1, [\t2+], #0x1000 143 ldw \t1, [\t2+], #0x2000 144 ldw \t1, [\t2+], #0x3000 145 .endm 146