1 /*
2 * arch/arm/mach-dove/common.c
3 *
4 * Core functions for Marvell Dove 88AP510 System On Chip
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/pci.h>
16 #include <linux/clk.h>
17 #include <linux/ata_platform.h>
18 #include <linux/gpio.h>
19 #include <asm/page.h>
20 #include <asm/setup.h>
21 #include <asm/timex.h>
22 #include <asm/hardware/cache-tauros2.h>
23 #include <asm/mach/map.h>
24 #include <asm/mach/time.h>
25 #include <asm/mach/pci.h>
26 #include <mach/dove.h>
27 #include <mach/bridge-regs.h>
28 #include <asm/mach/arch.h>
29 #include <linux/irq.h>
30 #include <plat/time.h>
31 #include <plat/ehci-orion.h>
32 #include <plat/common.h>
33 #include <plat/addr-map.h>
34 #include "common.h"
35
36 static int get_tclk(void);
37
38 /*****************************************************************************
39 * I/O Address Mapping
40 ****************************************************************************/
41 static struct map_desc dove_io_desc[] __initdata = {
42 {
43 .virtual = DOVE_SB_REGS_VIRT_BASE,
44 .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
45 .length = DOVE_SB_REGS_SIZE,
46 .type = MT_DEVICE,
47 }, {
48 .virtual = DOVE_NB_REGS_VIRT_BASE,
49 .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
50 .length = DOVE_NB_REGS_SIZE,
51 .type = MT_DEVICE,
52 }, {
53 .virtual = DOVE_PCIE0_IO_VIRT_BASE,
54 .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
55 .length = DOVE_PCIE0_IO_SIZE,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = DOVE_PCIE1_IO_VIRT_BASE,
59 .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
60 .length = DOVE_PCIE1_IO_SIZE,
61 .type = MT_DEVICE,
62 },
63 };
64
dove_map_io(void)65 void __init dove_map_io(void)
66 {
67 iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
68 }
69
70 /*****************************************************************************
71 * EHCI0
72 ****************************************************************************/
dove_ehci0_init(void)73 void __init dove_ehci0_init(void)
74 {
75 orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0, EHCI_PHY_NA);
76 }
77
78 /*****************************************************************************
79 * EHCI1
80 ****************************************************************************/
dove_ehci1_init(void)81 void __init dove_ehci1_init(void)
82 {
83 orion_ehci_1_init(DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
84 }
85
86 /*****************************************************************************
87 * GE00
88 ****************************************************************************/
dove_ge00_init(struct mv643xx_eth_platform_data * eth_data)89 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
90 {
91 orion_ge00_init(eth_data,
92 DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,
93 0, get_tclk());
94 }
95
96 /*****************************************************************************
97 * SoC RTC
98 ****************************************************************************/
dove_rtc_init(void)99 void __init dove_rtc_init(void)
100 {
101 orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
102 }
103
104 /*****************************************************************************
105 * SATA
106 ****************************************************************************/
dove_sata_init(struct mv_sata_platform_data * sata_data)107 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
108 {
109 orion_sata_init(sata_data, DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
110
111 }
112
113 /*****************************************************************************
114 * UART0
115 ****************************************************************************/
dove_uart0_init(void)116 void __init dove_uart0_init(void)
117 {
118 orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
119 IRQ_DOVE_UART_0, get_tclk());
120 }
121
122 /*****************************************************************************
123 * UART1
124 ****************************************************************************/
dove_uart1_init(void)125 void __init dove_uart1_init(void)
126 {
127 orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
128 IRQ_DOVE_UART_1, get_tclk());
129 }
130
131 /*****************************************************************************
132 * UART2
133 ****************************************************************************/
dove_uart2_init(void)134 void __init dove_uart2_init(void)
135 {
136 orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
137 IRQ_DOVE_UART_2, get_tclk());
138 }
139
140 /*****************************************************************************
141 * UART3
142 ****************************************************************************/
dove_uart3_init(void)143 void __init dove_uart3_init(void)
144 {
145 orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
146 IRQ_DOVE_UART_3, get_tclk());
147 }
148
149 /*****************************************************************************
150 * SPI
151 ****************************************************************************/
dove_spi0_init(void)152 void __init dove_spi0_init(void)
153 {
154 orion_spi_init(DOVE_SPI0_PHYS_BASE, get_tclk());
155 }
156
dove_spi1_init(void)157 void __init dove_spi1_init(void)
158 {
159 orion_spi_1_init(DOVE_SPI1_PHYS_BASE, get_tclk());
160 }
161
162 /*****************************************************************************
163 * I2C
164 ****************************************************************************/
dove_i2c_init(void)165 void __init dove_i2c_init(void)
166 {
167 orion_i2c_init(DOVE_I2C_PHYS_BASE, IRQ_DOVE_I2C, 10);
168 }
169
170 /*****************************************************************************
171 * Time handling
172 ****************************************************************************/
dove_init_early(void)173 void __init dove_init_early(void)
174 {
175 orion_time_set_base(TIMER_VIRT_BASE);
176 }
177
get_tclk(void)178 static int get_tclk(void)
179 {
180 /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
181 return 166666667;
182 }
183
dove_timer_init(void)184 static void dove_timer_init(void)
185 {
186 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
187 IRQ_DOVE_BRIDGE, get_tclk());
188 }
189
190 struct sys_timer dove_timer = {
191 .init = dove_timer_init,
192 };
193
194 /*****************************************************************************
195 * XOR 0
196 ****************************************************************************/
dove_xor0_init(void)197 void __init dove_xor0_init(void)
198 {
199 orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
200 IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
201 }
202
203 /*****************************************************************************
204 * XOR 1
205 ****************************************************************************/
dove_xor1_init(void)206 void __init dove_xor1_init(void)
207 {
208 orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE,
209 IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11);
210 }
211
212 /*****************************************************************************
213 * SDIO
214 ****************************************************************************/
215 static u64 sdio_dmamask = DMA_BIT_MASK(32);
216
217 static struct resource dove_sdio0_resources[] = {
218 {
219 .start = DOVE_SDIO0_PHYS_BASE,
220 .end = DOVE_SDIO0_PHYS_BASE + 0xff,
221 .flags = IORESOURCE_MEM,
222 }, {
223 .start = IRQ_DOVE_SDIO0,
224 .end = IRQ_DOVE_SDIO0,
225 .flags = IORESOURCE_IRQ,
226 },
227 };
228
229 static struct platform_device dove_sdio0 = {
230 .name = "sdhci-dove",
231 .id = 0,
232 .dev = {
233 .dma_mask = &sdio_dmamask,
234 .coherent_dma_mask = DMA_BIT_MASK(32),
235 },
236 .resource = dove_sdio0_resources,
237 .num_resources = ARRAY_SIZE(dove_sdio0_resources),
238 };
239
dove_sdio0_init(void)240 void __init dove_sdio0_init(void)
241 {
242 platform_device_register(&dove_sdio0);
243 }
244
245 static struct resource dove_sdio1_resources[] = {
246 {
247 .start = DOVE_SDIO1_PHYS_BASE,
248 .end = DOVE_SDIO1_PHYS_BASE + 0xff,
249 .flags = IORESOURCE_MEM,
250 }, {
251 .start = IRQ_DOVE_SDIO1,
252 .end = IRQ_DOVE_SDIO1,
253 .flags = IORESOURCE_IRQ,
254 },
255 };
256
257 static struct platform_device dove_sdio1 = {
258 .name = "sdhci-dove",
259 .id = 1,
260 .dev = {
261 .dma_mask = &sdio_dmamask,
262 .coherent_dma_mask = DMA_BIT_MASK(32),
263 },
264 .resource = dove_sdio1_resources,
265 .num_resources = ARRAY_SIZE(dove_sdio1_resources),
266 };
267
dove_sdio1_init(void)268 void __init dove_sdio1_init(void)
269 {
270 platform_device_register(&dove_sdio1);
271 }
272
dove_init(void)273 void __init dove_init(void)
274 {
275 int tclk;
276
277 tclk = get_tclk();
278
279 printk(KERN_INFO "Dove 88AP510 SoC, ");
280 printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000);
281
282 #ifdef CONFIG_CACHE_TAUROS2
283 tauros2_init();
284 #endif
285 dove_setup_cpu_mbus();
286
287 /* internal devices that every board has */
288 dove_rtc_init();
289 dove_xor0_init();
290 dove_xor1_init();
291 }
292
dove_restart(char mode,const char * cmd)293 void dove_restart(char mode, const char *cmd)
294 {
295 /*
296 * Enable soft reset to assert RSTOUTn.
297 */
298 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
299
300 /*
301 * Assert soft reset.
302 */
303 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
304
305 while (1)
306 ;
307 }
308