1 /* 2 * Copyright (C) 2008 Google, Inc. 3 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved. 4 * 5 * This software is licensed under the terms of the GNU General Public 6 * License version 2, as published by the Free Software Foundation, and 7 * may be copied, distributed, and modified under those terms. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 */ 15 16 #include <linux/kernel.h> 17 #include <linux/platform_device.h> 18 19 #include <linux/dma-mapping.h> 20 #include <linux/clkdev.h> 21 #include <mach/irqs.h> 22 #include <mach/msm_iomap.h> 23 #include <mach/dma.h> 24 #include <mach/board.h> 25 26 #include "devices.h" 27 #include "smd_private.h" 28 29 #include <asm/mach/flash.h> 30 31 #include "clock-pcom.h" 32 #include "clock-7x30.h" 33 34 #include <mach/mmc.h> 35 36 static struct resource resources_uart2[] = { 37 { 38 .start = INT_UART2, 39 .end = INT_UART2, 40 .flags = IORESOURCE_IRQ, 41 }, 42 { 43 .start = MSM_UART2_PHYS, 44 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1, 45 .flags = IORESOURCE_MEM, 46 .name = "uart_resource" 47 }, 48 }; 49 50 struct platform_device msm_device_uart2 = { 51 .name = "msm_serial", 52 .id = 1, 53 .num_resources = ARRAY_SIZE(resources_uart2), 54 .resource = resources_uart2, 55 }; 56 57 struct platform_device msm_device_smd = { 58 .name = "msm_smd", 59 .id = -1, 60 }; 61 62 static struct resource resources_otg[] = { 63 { 64 .start = MSM_HSUSB_PHYS, 65 .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, 66 .flags = IORESOURCE_MEM, 67 }, 68 { 69 .start = INT_USB_HS, 70 .end = INT_USB_HS, 71 .flags = IORESOURCE_IRQ, 72 }, 73 }; 74 75 struct platform_device msm_device_otg = { 76 .name = "msm_otg", 77 .id = -1, 78 .num_resources = ARRAY_SIZE(resources_otg), 79 .resource = resources_otg, 80 .dev = { 81 .coherent_dma_mask = 0xffffffff, 82 }, 83 }; 84 85 static struct resource resources_hsusb[] = { 86 { 87 .start = MSM_HSUSB_PHYS, 88 .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, 89 .flags = IORESOURCE_MEM, 90 }, 91 { 92 .start = INT_USB_HS, 93 .end = INT_USB_HS, 94 .flags = IORESOURCE_IRQ, 95 }, 96 }; 97 98 struct platform_device msm_device_hsusb = { 99 .name = "msm_hsusb", 100 .id = -1, 101 .num_resources = ARRAY_SIZE(resources_hsusb), 102 .resource = resources_hsusb, 103 .dev = { 104 .coherent_dma_mask = 0xffffffff, 105 }, 106 }; 107 108 static u64 dma_mask = 0xffffffffULL; 109 static struct resource resources_hsusb_host[] = { 110 { 111 .start = MSM_HSUSB_PHYS, 112 .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, 113 .flags = IORESOURCE_MEM, 114 }, 115 { 116 .start = INT_USB_HS, 117 .end = INT_USB_HS, 118 .flags = IORESOURCE_IRQ, 119 }, 120 }; 121 122 struct platform_device msm_device_hsusb_host = { 123 .name = "msm_hsusb_host", 124 .id = -1, 125 .num_resources = ARRAY_SIZE(resources_hsusb_host), 126 .resource = resources_hsusb_host, 127 .dev = { 128 .dma_mask = &dma_mask, 129 .coherent_dma_mask = 0xffffffffULL, 130 }, 131 }; 132 133 struct clk_lookup msm_clocks_7x30[] = { 134 CLK_PCOM("adm_clk", ADM_CLK, NULL, 0), 135 CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0), 136 CLK_PCOM("cam_m_clk", CAM_M_CLK, NULL, 0), 137 CLK_PCOM("camif_pad_pclk", CAMIF_PAD_P_CLK, NULL, OFF), 138 CLK_PCOM("ce_clk", CE_CLK, NULL, 0), 139 CLK_PCOM("codec_ssbi_clk", CODEC_SSBI_CLK, NULL, 0), 140 CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN), 141 CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0), 142 CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX), 143 CLK_PCOM("emdh_pclk", EMDH_P_CLK, NULL, OFF), 144 CLK_PCOM("gp_clk", GP_CLK, NULL, 0), 145 CLK_PCOM("grp_2d_clk", GRP_2D_CLK, NULL, 0), 146 CLK_PCOM("grp_2d_pclk", GRP_2D_P_CLK, NULL, 0), 147 CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0), 148 CLK_PCOM("grp_pclk", GRP_3D_P_CLK, NULL, 0), 149 CLK_7X30S("grp_src_clk", GRP_3D_SRC_CLK, GRP_3D_CLK, NULL, 0), 150 CLK_PCOM("hdmi_clk", HDMI_CLK, NULL, 0), 151 CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF), 152 CLK_PCOM("jpeg_clk", JPEG_CLK, NULL, OFF), 153 CLK_PCOM("jpeg_pclk", JPEG_P_CLK, NULL, OFF), 154 CLK_PCOM("lpa_codec_clk", LPA_CODEC_CLK, NULL, 0), 155 CLK_PCOM("lpa_core_clk", LPA_CORE_CLK, NULL, 0), 156 CLK_PCOM("lpa_pclk", LPA_P_CLK, NULL, 0), 157 CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0), 158 CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX), 159 CLK_PCOM("mddi_pclk", PMDH_P_CLK, NULL, 0), 160 CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF), 161 CLK_PCOM("mdp_pclk", MDP_P_CLK, NULL, 0), 162 CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0), 163 CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0), 164 CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0), 165 CLK_PCOM("mfc_clk", MFC_CLK, NULL, 0), 166 CLK_PCOM("mfc_div2_clk", MFC_DIV2_CLK, NULL, 0), 167 CLK_PCOM("mfc_pclk", MFC_P_CLK, NULL, 0), 168 CLK_PCOM("mi2s_m_clk", MI2S_M_CLK, NULL, 0), 169 CLK_PCOM("mi2s_s_clk", MI2S_S_CLK, NULL, 0), 170 CLK_PCOM("mi2s_codec_rx_m_clk", MI2S_CODEC_RX_M_CLK, NULL, 0), 171 CLK_PCOM("mi2s_codec_rx_s_clk", MI2S_CODEC_RX_S_CLK, NULL, 0), 172 CLK_PCOM("mi2s_codec_tx_m_clk", MI2S_CODEC_TX_M_CLK, NULL, 0), 173 CLK_PCOM("mi2s_codec_tx_s_clk", MI2S_CODEC_TX_S_CLK, NULL, 0), 174 CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN), 175 CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0), 176 CLK_PCOM("rotator_clk", AXI_ROTATOR_CLK, NULL, 0), 177 CLK_PCOM("rotator_imem_clk", ROTATOR_IMEM_CLK, NULL, OFF), 178 CLK_PCOM("rotator_pclk", ROTATOR_P_CLK, NULL, OFF), 179 CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF), 180 CLK_PCOM("spi_clk", SPI_CLK, NULL, 0), 181 CLK_PCOM("spi_pclk", SPI_P_CLK, NULL, 0), 182 CLK_7X30S("tv_src_clk", TV_CLK, TV_ENC_CLK, NULL, 0), 183 CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0), 184 CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0), 185 CLK_PCOM("uart_clk", UART2_CLK, "msm_serial.1", 0), 186 CLK_PCOM("usb_phy_clk", USB_PHY_CLK, NULL, 0), 187 CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF), 188 CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF), 189 CLK_PCOM("usb_hs_core_clk", USB_HS_CORE_CLK, NULL, OFF), 190 CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF), 191 CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF), 192 CLK_PCOM("usb_hs2_core_clk", USB_HS2_CORE_CLK, NULL, OFF), 193 CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF), 194 CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF), 195 CLK_PCOM("usb_hs3_core_clk", USB_HS3_CORE_CLK, NULL, OFF), 196 CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF | CLK_MIN), 197 CLK_PCOM("vfe_camif_clk", VFE_CAMIF_CLK, NULL, 0), 198 CLK_PCOM("vfe_clk", VFE_CLK, NULL, 0), 199 CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, 0), 200 CLK_PCOM("vfe_pclk", VFE_P_CLK, NULL, OFF), 201 CLK_PCOM("vpe_clk", VPE_CLK, NULL, 0), 202 203 /* 7x30 v2 hardware only. */ 204 CLK_PCOM("csi_clk", CSI0_CLK, NULL, 0), 205 CLK_PCOM("csi_pclk", CSI0_P_CLK, NULL, 0), 206 CLK_PCOM("csi_vfe_clk", CSI0_VFE_CLK, NULL, 0), 207 }; 208 209 unsigned msm_num_clocks_7x30 = ARRAY_SIZE(msm_clocks_7x30); 210 211