1 /*
2 * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 *
11 * Create static mapping between physical to virtual memory.
12 */
13
14 #include <linux/mm.h>
15 #include <linux/init.h>
16 #include <linux/clk.h>
17
18 #include <asm/system_misc.h>
19 #include <asm/mach/map.h>
20
21 #include <mach/hardware.h>
22 #include <mach/common.h>
23 #include <mach/devices-common.h>
24 #include <mach/iomux-v3.h>
25
26 static struct clk *gpc_dvfs_clk;
27
imx5_idle(void)28 static void imx5_idle(void)
29 {
30 /* gpc clock is needed for SRPG */
31 if (gpc_dvfs_clk == NULL) {
32 gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
33 if (IS_ERR(gpc_dvfs_clk))
34 return;
35 }
36 clk_enable(gpc_dvfs_clk);
37 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
38 if (!tzic_enable_wake())
39 cpu_do_idle();
40 clk_disable(gpc_dvfs_clk);
41 }
42
43 /*
44 * Define the MX50 memory map.
45 */
46 static struct map_desc mx50_io_desc[] __initdata = {
47 imx_map_entry(MX50, TZIC, MT_DEVICE),
48 imx_map_entry(MX50, SPBA0, MT_DEVICE),
49 imx_map_entry(MX50, AIPS1, MT_DEVICE),
50 imx_map_entry(MX50, AIPS2, MT_DEVICE),
51 };
52
53 /*
54 * Define the MX51 memory map.
55 */
56 static struct map_desc mx51_io_desc[] __initdata = {
57 imx_map_entry(MX51, TZIC, MT_DEVICE),
58 imx_map_entry(MX51, IRAM, MT_DEVICE),
59 imx_map_entry(MX51, AIPS1, MT_DEVICE),
60 imx_map_entry(MX51, SPBA0, MT_DEVICE),
61 imx_map_entry(MX51, AIPS2, MT_DEVICE),
62 };
63
64 /*
65 * Define the MX53 memory map.
66 */
67 static struct map_desc mx53_io_desc[] __initdata = {
68 imx_map_entry(MX53, TZIC, MT_DEVICE),
69 imx_map_entry(MX53, AIPS1, MT_DEVICE),
70 imx_map_entry(MX53, SPBA0, MT_DEVICE),
71 imx_map_entry(MX53, AIPS2, MT_DEVICE),
72 };
73
74 /*
75 * This function initializes the memory map. It is called during the
76 * system startup to create static physical to virtual memory mappings
77 * for the IO modules.
78 */
mx50_map_io(void)79 void __init mx50_map_io(void)
80 {
81 iotable_init(mx50_io_desc, ARRAY_SIZE(mx50_io_desc));
82 }
83
mx51_map_io(void)84 void __init mx51_map_io(void)
85 {
86 iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
87 }
88
mx53_map_io(void)89 void __init mx53_map_io(void)
90 {
91 iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
92 }
93
imx50_init_early(void)94 void __init imx50_init_early(void)
95 {
96 mxc_set_cpu_type(MXC_CPU_MX50);
97 mxc_iomux_v3_init(MX50_IO_ADDRESS(MX50_IOMUXC_BASE_ADDR));
98 mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR));
99 }
100
imx51_init_early(void)101 void __init imx51_init_early(void)
102 {
103 mxc_set_cpu_type(MXC_CPU_MX51);
104 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
105 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
106 arm_pm_idle = imx5_idle;
107 }
108
imx53_init_early(void)109 void __init imx53_init_early(void)
110 {
111 mxc_set_cpu_type(MXC_CPU_MX53);
112 mxc_iomux_v3_init(MX53_IO_ADDRESS(MX53_IOMUXC_BASE_ADDR));
113 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR));
114 }
115
mx50_init_irq(void)116 void __init mx50_init_irq(void)
117 {
118 tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR));
119 }
120
mx51_init_irq(void)121 void __init mx51_init_irq(void)
122 {
123 tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
124 }
125
mx53_init_irq(void)126 void __init mx53_init_irq(void)
127 {
128 tzic_init_irq(MX53_IO_ADDRESS(MX53_TZIC_BASE_ADDR));
129 }
130
131 static struct sdma_script_start_addrs imx51_sdma_script __initdata = {
132 .ap_2_ap_addr = 642,
133 .uart_2_mcu_addr = 817,
134 .mcu_2_app_addr = 747,
135 .mcu_2_shp_addr = 961,
136 .ata_2_mcu_addr = 1473,
137 .mcu_2_ata_addr = 1392,
138 .app_2_per_addr = 1033,
139 .app_2_mcu_addr = 683,
140 .shp_2_per_addr = 1251,
141 .shp_2_mcu_addr = 892,
142 };
143
144 static struct sdma_platform_data imx51_sdma_pdata __initdata = {
145 .fw_name = "sdma-imx51.bin",
146 .script_addrs = &imx51_sdma_script,
147 };
148
149 static struct sdma_script_start_addrs imx53_sdma_script __initdata = {
150 .ap_2_ap_addr = 642,
151 .app_2_mcu_addr = 683,
152 .mcu_2_app_addr = 747,
153 .uart_2_mcu_addr = 817,
154 .shp_2_mcu_addr = 891,
155 .mcu_2_shp_addr = 960,
156 .uartsh_2_mcu_addr = 1032,
157 .spdif_2_mcu_addr = 1100,
158 .mcu_2_spdif_addr = 1134,
159 .firi_2_mcu_addr = 1193,
160 .mcu_2_firi_addr = 1290,
161 };
162
163 static struct sdma_platform_data imx53_sdma_pdata __initdata = {
164 .fw_name = "sdma-imx53.bin",
165 .script_addrs = &imx53_sdma_script,
166 };
167
168 static const struct resource imx50_audmux_res[] __initconst = {
169 DEFINE_RES_MEM(MX50_AUDMUX_BASE_ADDR, SZ_16K),
170 };
171
172 static const struct resource imx51_audmux_res[] __initconst = {
173 DEFINE_RES_MEM(MX51_AUDMUX_BASE_ADDR, SZ_16K),
174 };
175
176 static const struct resource imx53_audmux_res[] __initconst = {
177 DEFINE_RES_MEM(MX53_AUDMUX_BASE_ADDR, SZ_16K),
178 };
179
imx50_soc_init(void)180 void __init imx50_soc_init(void)
181 {
182 /* i.mx50 has the i.mx31 type gpio */
183 mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
184 mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
185 mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
186 mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
187 mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
188 mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
189
190 /* i.mx50 has the i.mx31 type audmux */
191 platform_device_register_simple("imx31-audmux", 0, imx50_audmux_res,
192 ARRAY_SIZE(imx50_audmux_res));
193 }
194
imx51_soc_init(void)195 void __init imx51_soc_init(void)
196 {
197 /* i.mx51 has the i.mx31 type gpio */
198 mxc_register_gpio("imx31-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH);
199 mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH);
200 mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH);
201 mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH);
202
203 /* i.mx51 has the i.mx35 type sdma */
204 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
205
206 /* Setup AIPS registers */
207 imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR));
208 imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR));
209
210 /* i.mx51 has the i.mx31 type audmux */
211 platform_device_register_simple("imx31-audmux", 0, imx51_audmux_res,
212 ARRAY_SIZE(imx51_audmux_res));
213 }
214
imx53_soc_init(void)215 void __init imx53_soc_init(void)
216 {
217 /* i.mx53 has the i.mx31 type gpio */
218 mxc_register_gpio("imx31-gpio", 0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH);
219 mxc_register_gpio("imx31-gpio", 1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH);
220 mxc_register_gpio("imx31-gpio", 2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH);
221 mxc_register_gpio("imx31-gpio", 3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH);
222 mxc_register_gpio("imx31-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH);
223 mxc_register_gpio("imx31-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);
224 mxc_register_gpio("imx31-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);
225
226 /* i.mx53 has the i.mx35 type sdma */
227 imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
228
229 /* Setup AIPS registers */
230 imx_set_aips(MX53_IO_ADDRESS(MX53_AIPS1_BASE_ADDR));
231 imx_set_aips(MX53_IO_ADDRESS(MX53_AIPS2_BASE_ADDR));
232
233 /* i.mx53 has the i.mx31 type audmux */
234 platform_device_register_simple("imx31-audmux", 0, imx53_audmux_res,
235 ARRAY_SIZE(imx53_audmux_res));
236 }
237