1 /*
2 * Copyright (C) 2006 - 2008 Lemote Inc. & Insititute of Computing Technology
3 * Author: Yanhua, yanh@lemote.com
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9
10 #include <linux/module.h>
11 #include <linux/cpufreq.h>
12 #include <linux/platform_device.h>
13
14 #include <asm/clock.h>
15
16 #include <loongson.h>
17
18 static LIST_HEAD(clock_list);
19 static DEFINE_SPINLOCK(clock_lock);
20 static DEFINE_MUTEX(clock_list_sem);
21
22 /* Minimum CLK support */
23 enum {
24 DC_ZERO, DC_25PT = 2, DC_37PT, DC_50PT, DC_62PT, DC_75PT,
25 DC_87PT, DC_DISABLE, DC_RESV
26 };
27
28 struct cpufreq_frequency_table loongson2_clockmod_table[] = {
29 {DC_RESV, CPUFREQ_ENTRY_INVALID},
30 {DC_ZERO, CPUFREQ_ENTRY_INVALID},
31 {DC_25PT, 0},
32 {DC_37PT, 0},
33 {DC_50PT, 0},
34 {DC_62PT, 0},
35 {DC_75PT, 0},
36 {DC_87PT, 0},
37 {DC_DISABLE, 0},
38 {DC_RESV, CPUFREQ_TABLE_END},
39 };
40 EXPORT_SYMBOL_GPL(loongson2_clockmod_table);
41
42 static struct clk cpu_clk = {
43 .name = "cpu_clk",
44 .flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
45 .rate = 800000000,
46 };
47
clk_get(struct device * dev,const char * id)48 struct clk *clk_get(struct device *dev, const char *id)
49 {
50 return &cpu_clk;
51 }
52 EXPORT_SYMBOL(clk_get);
53
propagate_rate(struct clk * clk)54 static void propagate_rate(struct clk *clk)
55 {
56 struct clk *clkp;
57
58 list_for_each_entry(clkp, &clock_list, node) {
59 if (likely(clkp->parent != clk))
60 continue;
61 if (likely(clkp->ops && clkp->ops->recalc))
62 clkp->ops->recalc(clkp);
63 if (unlikely(clkp->flags & CLK_RATE_PROPAGATES))
64 propagate_rate(clkp);
65 }
66 }
67
clk_enable(struct clk * clk)68 int clk_enable(struct clk *clk)
69 {
70 return 0;
71 }
72 EXPORT_SYMBOL(clk_enable);
73
clk_disable(struct clk * clk)74 void clk_disable(struct clk *clk)
75 {
76 }
77 EXPORT_SYMBOL(clk_disable);
78
clk_get_rate(struct clk * clk)79 unsigned long clk_get_rate(struct clk *clk)
80 {
81 return (unsigned long)clk->rate;
82 }
83 EXPORT_SYMBOL(clk_get_rate);
84
clk_put(struct clk * clk)85 void clk_put(struct clk *clk)
86 {
87 }
88 EXPORT_SYMBOL(clk_put);
89
clk_set_rate(struct clk * clk,unsigned long rate)90 int clk_set_rate(struct clk *clk, unsigned long rate)
91 {
92 return clk_set_rate_ex(clk, rate, 0);
93 }
94 EXPORT_SYMBOL_GPL(clk_set_rate);
95
clk_set_rate_ex(struct clk * clk,unsigned long rate,int algo_id)96 int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
97 {
98 int ret = 0;
99 int regval;
100 int i;
101
102 if (likely(clk->ops && clk->ops->set_rate)) {
103 unsigned long flags;
104
105 spin_lock_irqsave(&clock_lock, flags);
106 ret = clk->ops->set_rate(clk, rate, algo_id);
107 spin_unlock_irqrestore(&clock_lock, flags);
108 }
109
110 if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
111 propagate_rate(clk);
112
113 for (i = 0; loongson2_clockmod_table[i].frequency != CPUFREQ_TABLE_END;
114 i++) {
115 if (loongson2_clockmod_table[i].frequency ==
116 CPUFREQ_ENTRY_INVALID)
117 continue;
118 if (rate == loongson2_clockmod_table[i].frequency)
119 break;
120 }
121 if (rate != loongson2_clockmod_table[i].frequency)
122 return -ENOTSUPP;
123
124 clk->rate = rate;
125
126 regval = LOONGSON_CHIPCFG0;
127 regval = (regval & ~0x7) | (loongson2_clockmod_table[i].index - 1);
128 LOONGSON_CHIPCFG0 = regval;
129
130 return ret;
131 }
132 EXPORT_SYMBOL_GPL(clk_set_rate_ex);
133
clk_round_rate(struct clk * clk,unsigned long rate)134 long clk_round_rate(struct clk *clk, unsigned long rate)
135 {
136 if (likely(clk->ops && clk->ops->round_rate)) {
137 unsigned long flags, rounded;
138
139 spin_lock_irqsave(&clock_lock, flags);
140 rounded = clk->ops->round_rate(clk, rate);
141 spin_unlock_irqrestore(&clock_lock, flags);
142
143 return rounded;
144 }
145
146 return rate;
147 }
148 EXPORT_SYMBOL_GPL(clk_round_rate);
149
150 /*
151 * This is the simple version of Loongson-2 wait, Maybe we need do this in
152 * interrupt disabled content
153 */
154
155 DEFINE_SPINLOCK(loongson2_wait_lock);
loongson2_cpu_wait(void)156 void loongson2_cpu_wait(void)
157 {
158 u32 cpu_freq;
159 unsigned long flags;
160
161 spin_lock_irqsave(&loongson2_wait_lock, flags);
162 cpu_freq = LOONGSON_CHIPCFG0;
163 LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */
164 LOONGSON_CHIPCFG0 = cpu_freq; /* Restore CPU state */
165 spin_unlock_irqrestore(&loongson2_wait_lock, flags);
166 }
167 EXPORT_SYMBOL_GPL(loongson2_cpu_wait);
168
169 MODULE_AUTHOR("Yanhua <yanh@lemote.com>");
170 MODULE_DESCRIPTION("cpufreq driver for Loongson 2F");
171 MODULE_LICENSE("GPL");
172