1 /*
2 * linux/arch/arm/mach-sa1100/time.c
3 *
4 * Copyright (C) 1998 Deborah Wallach.
5 * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com>
6 *
7 * 2000/03/29 (C) Nicolas Pitre <nico@fluxnic.net>
8 * Rewritten: big cleanup, much simpler, better HZ accuracy.
9 *
10 */
11 #include <linux/init.h>
12 #include <linux/errno.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/timex.h>
16 #include <linux/clockchips.h>
17
18 #include <asm/mach/time.h>
19 #include <asm/sched_clock.h>
20 #include <mach/hardware.h>
21 #include <mach/irqs.h>
22
sa1100_read_sched_clock(void)23 static u32 notrace sa1100_read_sched_clock(void)
24 {
25 return OSCR;
26 }
27
28 #define MIN_OSCR_DELTA 2
29
sa1100_ost0_interrupt(int irq,void * dev_id)30 static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id)
31 {
32 struct clock_event_device *c = dev_id;
33
34 /* Disarm the compare/match, signal the event. */
35 OIER &= ~OIER_E0;
36 OSSR = OSSR_M0;
37 c->event_handler(c);
38
39 return IRQ_HANDLED;
40 }
41
42 static int
sa1100_osmr0_set_next_event(unsigned long delta,struct clock_event_device * c)43 sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
44 {
45 unsigned long next, oscr;
46
47 OIER |= OIER_E0;
48 next = OSCR + delta;
49 OSMR0 = next;
50 oscr = OSCR;
51
52 return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
53 }
54
55 static void
sa1100_osmr0_set_mode(enum clock_event_mode mode,struct clock_event_device * c)56 sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
57 {
58 switch (mode) {
59 case CLOCK_EVT_MODE_ONESHOT:
60 case CLOCK_EVT_MODE_UNUSED:
61 case CLOCK_EVT_MODE_SHUTDOWN:
62 OIER &= ~OIER_E0;
63 OSSR = OSSR_M0;
64 break;
65
66 case CLOCK_EVT_MODE_RESUME:
67 case CLOCK_EVT_MODE_PERIODIC:
68 break;
69 }
70 }
71
72 static struct clock_event_device ckevt_sa1100_osmr0 = {
73 .name = "osmr0",
74 .features = CLOCK_EVT_FEAT_ONESHOT,
75 .rating = 200,
76 .set_next_event = sa1100_osmr0_set_next_event,
77 .set_mode = sa1100_osmr0_set_mode,
78 };
79
80 static struct irqaction sa1100_timer_irq = {
81 .name = "ost0",
82 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
83 .handler = sa1100_ost0_interrupt,
84 .dev_id = &ckevt_sa1100_osmr0,
85 };
86
sa1100_timer_init(void)87 static void __init sa1100_timer_init(void)
88 {
89 OIER = 0;
90 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
91
92 setup_sched_clock(sa1100_read_sched_clock, 32, 3686400);
93
94 clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4);
95 ckevt_sa1100_osmr0.max_delta_ns =
96 clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0);
97 ckevt_sa1100_osmr0.min_delta_ns =
98 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1;
99 ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
100
101 setup_irq(IRQ_OST0, &sa1100_timer_irq);
102
103 clocksource_mmio_init(&OSCR, "oscr", CLOCK_TICK_RATE, 200, 32,
104 clocksource_mmio_readl_up);
105 clockevents_register_device(&ckevt_sa1100_osmr0);
106 }
107
108 #ifdef CONFIG_PM
109 unsigned long osmr[4], oier;
110
sa1100_timer_suspend(void)111 static void sa1100_timer_suspend(void)
112 {
113 osmr[0] = OSMR0;
114 osmr[1] = OSMR1;
115 osmr[2] = OSMR2;
116 osmr[3] = OSMR3;
117 oier = OIER;
118 }
119
sa1100_timer_resume(void)120 static void sa1100_timer_resume(void)
121 {
122 OSSR = 0x0f;
123 OSMR0 = osmr[0];
124 OSMR1 = osmr[1];
125 OSMR2 = osmr[2];
126 OSMR3 = osmr[3];
127 OIER = oier;
128
129 /*
130 * OSMR0 is the system timer: make sure OSCR is sufficiently behind
131 */
132 OSCR = OSMR0 - LATCH;
133 }
134 #else
135 #define sa1100_timer_suspend NULL
136 #define sa1100_timer_resume NULL
137 #endif
138
139 struct sys_timer sa1100_timer = {
140 .init = sa1100_timer_init,
141 .suspend = sa1100_timer_suspend,
142 .resume = sa1100_timer_resume,
143 };
144