1 #include <linux/errno.h>
2 #include <linux/kernel.h>
3 #include <linux/mm.h>
4 #include <linux/smp.h>
5 #include <linux/prctl.h>
6 #include <linux/slab.h>
7 #include <linux/sched.h>
8 #include <linux/module.h>
9 #include <linux/pm.h>
10 #include <linux/clockchips.h>
11 #include <linux/random.h>
12 #include <linux/user-return-notifier.h>
13 #include <linux/dmi.h>
14 #include <linux/utsname.h>
15 #include <linux/stackprotector.h>
16 #include <linux/tick.h>
17 #include <linux/cpuidle.h>
18 #include <trace/events/power.h>
19 #include <linux/hw_breakpoint.h>
20 #include <asm/cpu.h>
21 #include <asm/apic.h>
22 #include <asm/syscalls.h>
23 #include <asm/idle.h>
24 #include <asm/uaccess.h>
25 #include <asm/i387.h>
26 #include <asm/fpu-internal.h>
27 #include <asm/debugreg.h>
28 #include <asm/nmi.h>
29
30 #ifdef CONFIG_X86_64
31 static DEFINE_PER_CPU(unsigned char, is_idle);
32 #endif
33
34 struct kmem_cache *task_xstate_cachep;
35 EXPORT_SYMBOL_GPL(task_xstate_cachep);
36
arch_dup_task_struct(struct task_struct * dst,struct task_struct * src)37 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
38 {
39 int ret;
40
41 *dst = *src;
42 if (fpu_allocated(&src->thread.fpu)) {
43 memset(&dst->thread.fpu, 0, sizeof(dst->thread.fpu));
44 ret = fpu_alloc(&dst->thread.fpu);
45 if (ret)
46 return ret;
47 fpu_copy(&dst->thread.fpu, &src->thread.fpu);
48 }
49 return 0;
50 }
51
free_thread_xstate(struct task_struct * tsk)52 void free_thread_xstate(struct task_struct *tsk)
53 {
54 fpu_free(&tsk->thread.fpu);
55 }
56
free_thread_info(struct thread_info * ti)57 void free_thread_info(struct thread_info *ti)
58 {
59 free_thread_xstate(ti->task);
60 free_pages((unsigned long)ti, THREAD_ORDER);
61 }
62
arch_task_cache_init(void)63 void arch_task_cache_init(void)
64 {
65 task_xstate_cachep =
66 kmem_cache_create("task_xstate", xstate_size,
67 __alignof__(union thread_xstate),
68 SLAB_PANIC | SLAB_NOTRACK, NULL);
69 }
70
71 /*
72 * Free current thread data structures etc..
73 */
exit_thread(void)74 void exit_thread(void)
75 {
76 struct task_struct *me = current;
77 struct thread_struct *t = &me->thread;
78 unsigned long *bp = t->io_bitmap_ptr;
79
80 if (bp) {
81 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
82
83 t->io_bitmap_ptr = NULL;
84 clear_thread_flag(TIF_IO_BITMAP);
85 /*
86 * Careful, clear this in the TSS too:
87 */
88 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
89 t->io_bitmap_max = 0;
90 put_cpu();
91 kfree(bp);
92 }
93 }
94
show_regs(struct pt_regs * regs)95 void show_regs(struct pt_regs *regs)
96 {
97 show_registers(regs);
98 show_trace(NULL, regs, (unsigned long *)kernel_stack_pointer(regs), 0);
99 }
100
show_regs_common(void)101 void show_regs_common(void)
102 {
103 const char *vendor, *product, *board;
104
105 vendor = dmi_get_system_info(DMI_SYS_VENDOR);
106 if (!vendor)
107 vendor = "";
108 product = dmi_get_system_info(DMI_PRODUCT_NAME);
109 if (!product)
110 product = "";
111
112 /* Board Name is optional */
113 board = dmi_get_system_info(DMI_BOARD_NAME);
114
115 printk(KERN_CONT "\n");
116 printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s",
117 current->pid, current->comm, print_tainted(),
118 init_utsname()->release,
119 (int)strcspn(init_utsname()->version, " "),
120 init_utsname()->version);
121 printk(KERN_CONT " %s %s", vendor, product);
122 if (board)
123 printk(KERN_CONT "/%s", board);
124 printk(KERN_CONT "\n");
125 }
126
flush_thread(void)127 void flush_thread(void)
128 {
129 struct task_struct *tsk = current;
130
131 flush_ptrace_hw_breakpoint(tsk);
132 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
133 /*
134 * Forget coprocessor state..
135 */
136 tsk->fpu_counter = 0;
137 clear_fpu(tsk);
138 clear_used_math();
139 }
140
hard_disable_TSC(void)141 static void hard_disable_TSC(void)
142 {
143 write_cr4(read_cr4() | X86_CR4_TSD);
144 }
145
disable_TSC(void)146 void disable_TSC(void)
147 {
148 preempt_disable();
149 if (!test_and_set_thread_flag(TIF_NOTSC))
150 /*
151 * Must flip the CPU state synchronously with
152 * TIF_NOTSC in the current running context.
153 */
154 hard_disable_TSC();
155 preempt_enable();
156 }
157
hard_enable_TSC(void)158 static void hard_enable_TSC(void)
159 {
160 write_cr4(read_cr4() & ~X86_CR4_TSD);
161 }
162
enable_TSC(void)163 static void enable_TSC(void)
164 {
165 preempt_disable();
166 if (test_and_clear_thread_flag(TIF_NOTSC))
167 /*
168 * Must flip the CPU state synchronously with
169 * TIF_NOTSC in the current running context.
170 */
171 hard_enable_TSC();
172 preempt_enable();
173 }
174
get_tsc_mode(unsigned long adr)175 int get_tsc_mode(unsigned long adr)
176 {
177 unsigned int val;
178
179 if (test_thread_flag(TIF_NOTSC))
180 val = PR_TSC_SIGSEGV;
181 else
182 val = PR_TSC_ENABLE;
183
184 return put_user(val, (unsigned int __user *)adr);
185 }
186
set_tsc_mode(unsigned int val)187 int set_tsc_mode(unsigned int val)
188 {
189 if (val == PR_TSC_SIGSEGV)
190 disable_TSC();
191 else if (val == PR_TSC_ENABLE)
192 enable_TSC();
193 else
194 return -EINVAL;
195
196 return 0;
197 }
198
__switch_to_xtra(struct task_struct * prev_p,struct task_struct * next_p,struct tss_struct * tss)199 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
200 struct tss_struct *tss)
201 {
202 struct thread_struct *prev, *next;
203
204 prev = &prev_p->thread;
205 next = &next_p->thread;
206
207 if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
208 test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
209 unsigned long debugctl = get_debugctlmsr();
210
211 debugctl &= ~DEBUGCTLMSR_BTF;
212 if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
213 debugctl |= DEBUGCTLMSR_BTF;
214
215 update_debugctlmsr(debugctl);
216 }
217
218 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
219 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
220 /* prev and next are different */
221 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
222 hard_disable_TSC();
223 else
224 hard_enable_TSC();
225 }
226
227 if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
228 /*
229 * Copy the relevant range of the IO bitmap.
230 * Normally this is 128 bytes or less:
231 */
232 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
233 max(prev->io_bitmap_max, next->io_bitmap_max));
234 } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
235 /*
236 * Clear any possible leftover bits:
237 */
238 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
239 }
240 propagate_user_return_notify(prev_p, next_p);
241 }
242
sys_fork(struct pt_regs * regs)243 int sys_fork(struct pt_regs *regs)
244 {
245 return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
246 }
247
248 /*
249 * This is trivial, and on the face of it looks like it
250 * could equally well be done in user mode.
251 *
252 * Not so, for quite unobvious reasons - register pressure.
253 * In user mode vfork() cannot have a stack frame, and if
254 * done by calling the "clone()" system call directly, you
255 * do not have enough call-clobbered registers to hold all
256 * the information you need.
257 */
sys_vfork(struct pt_regs * regs)258 int sys_vfork(struct pt_regs *regs)
259 {
260 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
261 NULL, NULL);
262 }
263
264 long
sys_clone(unsigned long clone_flags,unsigned long newsp,void __user * parent_tid,void __user * child_tid,struct pt_regs * regs)265 sys_clone(unsigned long clone_flags, unsigned long newsp,
266 void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
267 {
268 if (!newsp)
269 newsp = regs->sp;
270 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
271 }
272
273 /*
274 * This gets run with %si containing the
275 * function to call, and %di containing
276 * the "args".
277 */
278 extern void kernel_thread_helper(void);
279
280 /*
281 * Create a kernel thread
282 */
kernel_thread(int (* fn)(void *),void * arg,unsigned long flags)283 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
284 {
285 struct pt_regs regs;
286
287 memset(®s, 0, sizeof(regs));
288
289 regs.si = (unsigned long) fn;
290 regs.di = (unsigned long) arg;
291
292 #ifdef CONFIG_X86_32
293 regs.ds = __USER_DS;
294 regs.es = __USER_DS;
295 regs.fs = __KERNEL_PERCPU;
296 regs.gs = __KERNEL_STACK_CANARY;
297 #else
298 regs.ss = __KERNEL_DS;
299 #endif
300
301 regs.orig_ax = -1;
302 regs.ip = (unsigned long) kernel_thread_helper;
303 regs.cs = __KERNEL_CS | get_kernel_rpl();
304 regs.flags = X86_EFLAGS_IF | X86_EFLAGS_BIT1;
305
306 /* Ok, create the new process.. */
307 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
308 }
309 EXPORT_SYMBOL(kernel_thread);
310
311 /*
312 * sys_execve() executes a new program.
313 */
sys_execve(const char __user * name,const char __user * const __user * argv,const char __user * const __user * envp,struct pt_regs * regs)314 long sys_execve(const char __user *name,
315 const char __user *const __user *argv,
316 const char __user *const __user *envp, struct pt_regs *regs)
317 {
318 long error;
319 char *filename;
320
321 filename = getname(name);
322 error = PTR_ERR(filename);
323 if (IS_ERR(filename))
324 return error;
325 error = do_execve(filename, argv, envp, regs);
326
327 #ifdef CONFIG_X86_32
328 if (error == 0) {
329 /* Make sure we don't return using sysenter.. */
330 set_thread_flag(TIF_IRET);
331 }
332 #endif
333
334 putname(filename);
335 return error;
336 }
337
338 /*
339 * Idle related variables and functions
340 */
341 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
342 EXPORT_SYMBOL(boot_option_idle_override);
343
344 /*
345 * Powermanagement idle function, if any..
346 */
347 void (*pm_idle)(void);
348 #ifdef CONFIG_APM_MODULE
349 EXPORT_SYMBOL(pm_idle);
350 #endif
351
hlt_use_halt(void)352 static inline int hlt_use_halt(void)
353 {
354 return 1;
355 }
356
357 #ifndef CONFIG_SMP
play_dead(void)358 static inline void play_dead(void)
359 {
360 BUG();
361 }
362 #endif
363
364 #ifdef CONFIG_X86_64
enter_idle(void)365 void enter_idle(void)
366 {
367 percpu_write(is_idle, 1);
368 idle_notifier_call_chain(IDLE_START);
369 }
370
__exit_idle(void)371 static void __exit_idle(void)
372 {
373 if (x86_test_and_clear_bit_percpu(0, is_idle) == 0)
374 return;
375 idle_notifier_call_chain(IDLE_END);
376 }
377
378 /* Called from interrupts to signify idle end */
exit_idle(void)379 void exit_idle(void)
380 {
381 /* idle loop has pid 0 */
382 if (current->pid)
383 return;
384 __exit_idle();
385 }
386 #endif
387
388 /*
389 * The idle thread. There's no useful work to be
390 * done, so just try to conserve power and have a
391 * low exit latency (ie sit in a loop waiting for
392 * somebody to say that they'd like to reschedule)
393 */
cpu_idle(void)394 void cpu_idle(void)
395 {
396 /*
397 * If we're the non-boot CPU, nothing set the stack canary up
398 * for us. CPU0 already has it initialized but no harm in
399 * doing it again. This is a good place for updating it, as
400 * we wont ever return from this function (so the invalid
401 * canaries already on the stack wont ever trigger).
402 */
403 boot_init_stack_canary();
404 current_thread_info()->status |= TS_POLLING;
405
406 while (1) {
407 tick_nohz_idle_enter();
408
409 while (!need_resched()) {
410 rmb();
411
412 if (cpu_is_offline(smp_processor_id()))
413 play_dead();
414
415 /*
416 * Idle routines should keep interrupts disabled
417 * from here on, until they go to idle.
418 * Otherwise, idle callbacks can misfire.
419 */
420 local_touch_nmi();
421 local_irq_disable();
422
423 enter_idle();
424
425 /* Don't trace irqs off for idle */
426 stop_critical_timings();
427
428 /* enter_idle() needs rcu for notifiers */
429 rcu_idle_enter();
430
431 if (cpuidle_idle_call())
432 pm_idle();
433
434 rcu_idle_exit();
435 start_critical_timings();
436
437 /* In many cases the interrupt that ended idle
438 has already called exit_idle. But some idle
439 loops can be woken up without interrupt. */
440 __exit_idle();
441 }
442
443 tick_nohz_idle_exit();
444 preempt_enable_no_resched();
445 schedule();
446 preempt_disable();
447 }
448 }
449
450 /*
451 * We use this if we don't have any better
452 * idle routine..
453 */
default_idle(void)454 void default_idle(void)
455 {
456 if (hlt_use_halt()) {
457 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
458 trace_cpu_idle_rcuidle(1, smp_processor_id());
459 current_thread_info()->status &= ~TS_POLLING;
460 /*
461 * TS_POLLING-cleared state must be visible before we
462 * test NEED_RESCHED:
463 */
464 smp_mb();
465
466 if (!need_resched())
467 safe_halt(); /* enables interrupts racelessly */
468 else
469 local_irq_enable();
470 current_thread_info()->status |= TS_POLLING;
471 trace_power_end_rcuidle(smp_processor_id());
472 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
473 } else {
474 local_irq_enable();
475 /* loop is done by the caller */
476 cpu_relax();
477 }
478 }
479 #ifdef CONFIG_APM_MODULE
480 EXPORT_SYMBOL(default_idle);
481 #endif
482
set_pm_idle_to_default(void)483 bool set_pm_idle_to_default(void)
484 {
485 bool ret = !!pm_idle;
486
487 pm_idle = default_idle;
488
489 return ret;
490 }
stop_this_cpu(void * dummy)491 void stop_this_cpu(void *dummy)
492 {
493 local_irq_disable();
494 /*
495 * Remove this CPU:
496 */
497 set_cpu_online(smp_processor_id(), false);
498 disable_local_APIC();
499
500 for (;;) {
501 if (hlt_works(smp_processor_id()))
502 halt();
503 }
504 }
505
do_nothing(void * unused)506 static void do_nothing(void *unused)
507 {
508 }
509
510 /*
511 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
512 * pm_idle and update to new pm_idle value. Required while changing pm_idle
513 * handler on SMP systems.
514 *
515 * Caller must have changed pm_idle to the new value before the call. Old
516 * pm_idle value will not be used by any CPU after the return of this function.
517 */
cpu_idle_wait(void)518 void cpu_idle_wait(void)
519 {
520 smp_mb();
521 /* kick all the CPUs so that they exit out of pm_idle */
522 smp_call_function(do_nothing, NULL, 1);
523 }
524 EXPORT_SYMBOL_GPL(cpu_idle_wait);
525
526 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
mwait_idle(void)527 static void mwait_idle(void)
528 {
529 if (!need_resched()) {
530 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
531 trace_cpu_idle_rcuidle(1, smp_processor_id());
532 if (this_cpu_has(X86_FEATURE_CLFLUSH_MONITOR))
533 clflush((void *)¤t_thread_info()->flags);
534
535 __monitor((void *)¤t_thread_info()->flags, 0, 0);
536 smp_mb();
537 if (!need_resched())
538 __sti_mwait(0, 0);
539 else
540 local_irq_enable();
541 trace_power_end_rcuidle(smp_processor_id());
542 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
543 } else
544 local_irq_enable();
545 }
546
547 /*
548 * On SMP it's slightly faster (but much more power-consuming!)
549 * to poll the ->work.need_resched flag instead of waiting for the
550 * cross-CPU IPI to arrive. Use this option with caution.
551 */
poll_idle(void)552 static void poll_idle(void)
553 {
554 trace_power_start_rcuidle(POWER_CSTATE, 0, smp_processor_id());
555 trace_cpu_idle_rcuidle(0, smp_processor_id());
556 local_irq_enable();
557 while (!need_resched())
558 cpu_relax();
559 trace_power_end_rcuidle(smp_processor_id());
560 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
561 }
562
563 /*
564 * mwait selection logic:
565 *
566 * It depends on the CPU. For AMD CPUs that support MWAIT this is
567 * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
568 * then depend on a clock divisor and current Pstate of the core. If
569 * all cores of a processor are in halt state (C1) the processor can
570 * enter the C1E (C1 enhanced) state. If mwait is used this will never
571 * happen.
572 *
573 * idle=mwait overrides this decision and forces the usage of mwait.
574 */
575
576 #define MWAIT_INFO 0x05
577 #define MWAIT_ECX_EXTENDED_INFO 0x01
578 #define MWAIT_EDX_C1 0xf0
579
mwait_usable(const struct cpuinfo_x86 * c)580 int mwait_usable(const struct cpuinfo_x86 *c)
581 {
582 u32 eax, ebx, ecx, edx;
583
584 if (boot_option_idle_override == IDLE_FORCE_MWAIT)
585 return 1;
586
587 if (c->cpuid_level < MWAIT_INFO)
588 return 0;
589
590 cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
591 /* Check, whether EDX has extended info about MWAIT */
592 if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
593 return 1;
594
595 /*
596 * edx enumeratios MONITOR/MWAIT extensions. Check, whether
597 * C1 supports MWAIT
598 */
599 return (edx & MWAIT_EDX_C1);
600 }
601
602 bool amd_e400_c1e_detected;
603 EXPORT_SYMBOL(amd_e400_c1e_detected);
604
605 static cpumask_var_t amd_e400_c1e_mask;
606
amd_e400_remove_cpu(int cpu)607 void amd_e400_remove_cpu(int cpu)
608 {
609 if (amd_e400_c1e_mask != NULL)
610 cpumask_clear_cpu(cpu, amd_e400_c1e_mask);
611 }
612
613 /*
614 * AMD Erratum 400 aware idle routine. We check for C1E active in the interrupt
615 * pending message MSR. If we detect C1E, then we handle it the same
616 * way as C3 power states (local apic timer and TSC stop)
617 */
amd_e400_idle(void)618 static void amd_e400_idle(void)
619 {
620 if (need_resched())
621 return;
622
623 if (!amd_e400_c1e_detected) {
624 u32 lo, hi;
625
626 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
627
628 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
629 amd_e400_c1e_detected = true;
630 if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
631 mark_tsc_unstable("TSC halt in AMD C1E");
632 printk(KERN_INFO "System has AMD C1E enabled\n");
633 }
634 }
635
636 if (amd_e400_c1e_detected) {
637 int cpu = smp_processor_id();
638
639 if (!cpumask_test_cpu(cpu, amd_e400_c1e_mask)) {
640 cpumask_set_cpu(cpu, amd_e400_c1e_mask);
641 /*
642 * Force broadcast so ACPI can not interfere.
643 */
644 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
645 &cpu);
646 printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
647 cpu);
648 }
649 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
650
651 default_idle();
652
653 /*
654 * The switch back from broadcast mode needs to be
655 * called with interrupts disabled.
656 */
657 local_irq_disable();
658 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
659 local_irq_enable();
660 } else
661 default_idle();
662 }
663
select_idle_routine(const struct cpuinfo_x86 * c)664 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
665 {
666 #ifdef CONFIG_SMP
667 if (pm_idle == poll_idle && smp_num_siblings > 1) {
668 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
669 " performance may degrade.\n");
670 }
671 #endif
672 if (pm_idle)
673 return;
674
675 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
676 /*
677 * One CPU supports mwait => All CPUs supports mwait
678 */
679 printk(KERN_INFO "using mwait in idle threads.\n");
680 pm_idle = mwait_idle;
681 } else if (cpu_has_amd_erratum(amd_erratum_400)) {
682 /* E400: APIC timer interrupt does not wake up CPU from C1e */
683 printk(KERN_INFO "using AMD E400 aware idle routine\n");
684 pm_idle = amd_e400_idle;
685 } else
686 pm_idle = default_idle;
687 }
688
init_amd_e400_c1e_mask(void)689 void __init init_amd_e400_c1e_mask(void)
690 {
691 /* If we're using amd_e400_idle, we need to allocate amd_e400_c1e_mask. */
692 if (pm_idle == amd_e400_idle)
693 zalloc_cpumask_var(&amd_e400_c1e_mask, GFP_KERNEL);
694 }
695
idle_setup(char * str)696 static int __init idle_setup(char *str)
697 {
698 if (!str)
699 return -EINVAL;
700
701 if (!strcmp(str, "poll")) {
702 printk("using polling idle threads.\n");
703 pm_idle = poll_idle;
704 boot_option_idle_override = IDLE_POLL;
705 } else if (!strcmp(str, "mwait")) {
706 boot_option_idle_override = IDLE_FORCE_MWAIT;
707 WARN_ONCE(1, "\"idle=mwait\" will be removed in 2012\n");
708 } else if (!strcmp(str, "halt")) {
709 /*
710 * When the boot option of idle=halt is added, halt is
711 * forced to be used for CPU idle. In such case CPU C2/C3
712 * won't be used again.
713 * To continue to load the CPU idle driver, don't touch
714 * the boot_option_idle_override.
715 */
716 pm_idle = default_idle;
717 boot_option_idle_override = IDLE_HALT;
718 } else if (!strcmp(str, "nomwait")) {
719 /*
720 * If the boot option of "idle=nomwait" is added,
721 * it means that mwait will be disabled for CPU C2/C3
722 * states. In such case it won't touch the variable
723 * of boot_option_idle_override.
724 */
725 boot_option_idle_override = IDLE_NOMWAIT;
726 } else
727 return -1;
728
729 return 0;
730 }
731 early_param("idle", idle_setup);
732
arch_align_stack(unsigned long sp)733 unsigned long arch_align_stack(unsigned long sp)
734 {
735 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
736 sp -= get_random_int() % 8192;
737 return sp & ~0xf;
738 }
739
arch_randomize_brk(struct mm_struct * mm)740 unsigned long arch_randomize_brk(struct mm_struct *mm)
741 {
742 unsigned long range_end = mm->brk + 0x02000000;
743 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
744 }
745
746