1 /*
2 * smp.h: PowerPC-specific SMP code.
3 *
4 * Original was a copy of sparc smp.h. Now heavily modified
5 * for PPC.
6 *
7 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
8 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16 #ifndef _ASM_POWERPC_SMP_H
17 #define _ASM_POWERPC_SMP_H
18 #ifdef __KERNEL__
19
20 #include <linux/threads.h>
21 #include <linux/cpumask.h>
22 #include <linux/kernel.h>
23 #include <linux/irqreturn.h>
24
25 #ifndef __ASSEMBLY__
26
27 #ifdef CONFIG_PPC64
28 #include <asm/paca.h>
29 #endif
30 #include <asm/percpu.h>
31
32 extern int boot_cpuid;
33 extern int spinning_secondaries;
34
35 extern void cpu_die(void);
36
37 #ifdef CONFIG_SMP
38
39 struct smp_ops_t {
40 void (*message_pass)(int cpu, int msg);
41 #ifdef CONFIG_PPC_SMP_MUXED_IPI
42 void (*cause_ipi)(int cpu, unsigned long data);
43 #endif
44 int (*probe)(void);
45 int (*kick_cpu)(int nr);
46 void (*setup_cpu)(int nr);
47 void (*bringup_done)(void);
48 void (*take_timebase)(void);
49 void (*give_timebase)(void);
50 int (*cpu_disable)(void);
51 void (*cpu_die)(unsigned int nr);
52 int (*cpu_bootable)(unsigned int nr);
53 };
54
55 extern void smp_send_debugger_break(void);
56 extern void start_secondary_resume(void);
57 extern void __devinit smp_generic_give_timebase(void);
58 extern void __devinit smp_generic_take_timebase(void);
59
60 DECLARE_PER_CPU(unsigned int, cpu_pvr);
61
62 #ifdef CONFIG_HOTPLUG_CPU
63 extern void migrate_irqs(void);
64 int generic_cpu_disable(void);
65 void generic_cpu_die(unsigned int cpu);
66 void generic_mach_cpu_die(void);
67 void generic_set_cpu_dead(unsigned int cpu);
68 int generic_check_cpu_restart(unsigned int cpu);
69 #endif
70
71 #ifdef CONFIG_PPC64
72 #define raw_smp_processor_id() (local_paca->paca_index)
73 #define hard_smp_processor_id() (get_paca()->hw_cpu_id)
74 #else
75 /* 32-bit */
76 extern int smp_hw_index[];
77
78 #define raw_smp_processor_id() (current_thread_info()->cpu)
79 #define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
80
get_hard_smp_processor_id(int cpu)81 static inline int get_hard_smp_processor_id(int cpu)
82 {
83 return smp_hw_index[cpu];
84 }
85
set_hard_smp_processor_id(int cpu,int phys)86 static inline void set_hard_smp_processor_id(int cpu, int phys)
87 {
88 smp_hw_index[cpu] = phys;
89 }
90 #endif
91
92 DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
93 DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
94
cpu_sibling_mask(int cpu)95 static inline struct cpumask *cpu_sibling_mask(int cpu)
96 {
97 return per_cpu(cpu_sibling_map, cpu);
98 }
99
cpu_core_mask(int cpu)100 static inline struct cpumask *cpu_core_mask(int cpu)
101 {
102 return per_cpu(cpu_core_map, cpu);
103 }
104
105 extern int cpu_to_core_id(int cpu);
106
107 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
108 *
109 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
110 * in /proc/interrupts will be wrong!!! --Troy */
111 #define PPC_MSG_CALL_FUNCTION 0
112 #define PPC_MSG_RESCHEDULE 1
113 #define PPC_MSG_CALL_FUNC_SINGLE 2
114 #define PPC_MSG_DEBUGGER_BREAK 3
115
116 /* for irq controllers that have dedicated ipis per message (4) */
117 extern int smp_request_message_ipi(int virq, int message);
118 extern const char *smp_ipi_name[];
119
120 /* for irq controllers with only a single ipi */
121 extern void smp_muxed_ipi_set_data(int cpu, unsigned long data);
122 extern void smp_muxed_ipi_message_pass(int cpu, int msg);
123 extern irqreturn_t smp_ipi_demux(void);
124
125 void smp_init_pSeries(void);
126 void smp_init_cell(void);
127 void smp_init_celleb(void);
128 void smp_setup_cpu_maps(void);
129
130 extern int __cpu_disable(void);
131 extern void __cpu_die(unsigned int cpu);
132
133 #else
134 /* for UP */
135 #define hard_smp_processor_id() get_hard_smp_processor_id(0)
136 #define smp_setup_cpu_maps()
137
138 #endif /* CONFIG_SMP */
139
140 #ifdef CONFIG_PPC64
get_hard_smp_processor_id(int cpu)141 static inline int get_hard_smp_processor_id(int cpu)
142 {
143 return paca[cpu].hw_cpu_id;
144 }
145
set_hard_smp_processor_id(int cpu,int phys)146 static inline void set_hard_smp_processor_id(int cpu, int phys)
147 {
148 paca[cpu].hw_cpu_id = phys;
149 }
150
151 extern void smp_release_cpus(void);
152
153 #else
154 /* 32-bit */
155 #ifndef CONFIG_SMP
156 extern int boot_cpuid_phys;
get_hard_smp_processor_id(int cpu)157 static inline int get_hard_smp_processor_id(int cpu)
158 {
159 return boot_cpuid_phys;
160 }
161
set_hard_smp_processor_id(int cpu,int phys)162 static inline void set_hard_smp_processor_id(int cpu, int phys)
163 {
164 boot_cpuid_phys = phys;
165 }
166 #endif /* !CONFIG_SMP */
167 #endif /* !CONFIG_PPC64 */
168
169 extern int smt_enabled_at_boot;
170
171 extern int smp_mpic_probe(void);
172 extern void smp_mpic_setup_cpu(int cpu);
173 extern int smp_generic_kick_cpu(int nr);
174
175 extern void smp_generic_give_timebase(void);
176 extern void smp_generic_take_timebase(void);
177
178 extern struct smp_ops_t *smp_ops;
179
180 extern void arch_send_call_function_single_ipi(int cpu);
181 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
182
183 /* Definitions relative to the secondary CPU spin loop
184 * and entry point. Not all of them exist on both 32 and
185 * 64-bit but defining them all here doesn't harm
186 */
187 extern void generic_secondary_smp_init(void);
188 extern void generic_secondary_thread_init(void);
189 extern unsigned long __secondary_hold_spinloop;
190 extern unsigned long __secondary_hold_acknowledge;
191 extern char __secondary_hold;
192
193 #endif /* __ASSEMBLY__ */
194
195 #endif /* __KERNEL__ */
196 #endif /* _ASM_POWERPC_SMP_H) */
197