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1 /*
2  * Intel Wireless Multicomm 3200 WiFi driver
3  *
4  * Copyright (C) 2009 Intel Corporation. All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  *
10  *   * Redistributions of source code must retain the above copyright
11  *     notice, this list of conditions and the following disclaimer.
12  *   * Redistributions in binary form must reproduce the above copyright
13  *     notice, this list of conditions and the following disclaimer in
14  *     the documentation and/or other materials provided with the
15  *     distribution.
16  *   * Neither the name of Intel Corporation nor the names of its
17  *     contributors may be used to endorse or promote products derived
18  *     from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  *
32  *
33  * Intel Corporation <ilw@linux.intel.com>
34  * Samuel Ortiz <samuel.ortiz@intel.com>
35  * Zhu Yi <yi.zhu@intel.com>
36  *
37  */
38 
39 #ifndef __IWM_COMMANDS_H__
40 #define __IWM_COMMANDS_H__
41 
42 #include <linux/ieee80211.h>
43 
44 #define IWM_BARKER_REBOOT_NOTIFICATION	0xF
45 #define IWM_ACK_BARKER_NOTIFICATION	0x10
46 
47 /* UMAC commands */
48 #define UMAC_RST_CTRL_FLG_LARC_CLK_EN	0x0001
49 #define UMAC_RST_CTRL_FLG_LARC_RESET	0x0002
50 #define UMAC_RST_CTRL_FLG_FUNC_RESET	0x0004
51 #define UMAC_RST_CTRL_FLG_DEV_RESET	0x0008
52 #define UMAC_RST_CTRL_FLG_WIFI_CORE_EN	0x0010
53 #define UMAC_RST_CTRL_FLG_WIFI_LINK_EN	0x0040
54 #define UMAC_RST_CTRL_FLG_WIFI_MLME_EN	0x0080
55 #define UMAC_RST_CTRL_FLG_NVM_RELOAD	0x0100
56 
57 struct iwm_umac_cmd_reset {
58 	__le32 flags;
59 } __packed;
60 
61 #define UMAC_PARAM_TBL_ORD_FIX    0x0
62 #define UMAC_PARAM_TBL_ORD_VAR    0x1
63 #define UMAC_PARAM_TBL_CFG_FIX    0x2
64 #define UMAC_PARAM_TBL_CFG_VAR    0x3
65 #define UMAC_PARAM_TBL_BSS_TRK    0x4
66 #define UMAC_PARAM_TBL_FA_CFG_FIX 0x5
67 #define UMAC_PARAM_TBL_STA        0x6
68 #define UMAC_PARAM_TBL_CHN        0x7
69 #define UMAC_PARAM_TBL_STATISTICS 0x8
70 
71 /* fast access table */
72 enum {
73 	CFG_FRAG_THRESHOLD = 0,
74 	CFG_FRAME_RETRY_LIMIT,
75 	CFG_OS_QUEUE_UTIL_TH,
76 	CFG_RX_FILTER,
77 	/* <-- LAST --> */
78 	FAST_ACCESS_CFG_TBL_FIX_LAST
79 };
80 
81 /* fixed size table */
82 enum {
83 	CFG_POWER_INDEX = 0,
84 	CFG_PM_LEGACY_RX_TIMEOUT,
85 	CFG_PM_LEGACY_TX_TIMEOUT,
86 	CFG_PM_CTRL_FLAGS,
87 	CFG_PM_KEEP_ALIVE_IN_BEACONS,
88 	CFG_BT_ON_THRESHOLD,
89 	CFG_RTS_THRESHOLD,
90 	CFG_CTS_TO_SELF,
91 	CFG_COEX_MODE,
92 	CFG_WIRELESS_MODE,
93 	CFG_ASSOCIATION_TIMEOUT,
94 	CFG_ROAM_TIMEOUT,
95 	CFG_CAPABILITY_SUPPORTED_RATES,
96 	CFG_SCAN_ALLOWED_UNASSOC_FLAGS,
97 	CFG_SCAN_ALLOWED_MAIN_ASSOC_FLAGS,
98 	CFG_SCAN_ALLOWED_PAN_ASSOC_FLAGS,
99 	CFG_SCAN_INTERNAL_PERIODIC_ENABLED,
100 	CFG_SCAN_IMM_INTERNAL_PERIODIC_SCAN_ON_INIT,
101 	CFG_SCAN_DEFAULT_PERIODIC_FREQ_SEC,
102 	CFG_SCAN_NUM_PASSIVE_CHAN_PER_PARTIAL_SCAN,
103 	CFG_TLC_SUPPORTED_TX_HT_RATES,
104 	CFG_TLC_SUPPORTED_TX_RATES,
105 	CFG_TLC_SPATIAL_STREAM_SUPPORTED,
106 	CFG_TLC_RETRY_PER_RATE,
107 	CFG_TLC_RETRY_PER_HT_RATE,
108 	CFG_TLC_FIXED_MCS,
109 	CFG_TLC_CONTROL_FLAGS,
110 	CFG_TLC_SR_MIN_FAIL,
111 	CFG_TLC_SR_MIN_PASS,
112 	CFG_TLC_HT_STAY_IN_COL_PASS_THRESH,
113 	CFG_TLC_HT_STAY_IN_COL_FAIL_THRESH,
114 	CFG_TLC_LEGACY_STAY_IN_COL_PASS_THRESH,
115 	CFG_TLC_LEGACY_STAY_IN_COL_FAIL_THRESH,
116 	CFG_TLC_HT_FLUSH_STATS_PACKETS,
117 	CFG_TLC_LEGACY_FLUSH_STATS_PACKETS,
118 	CFG_TLC_LEGACY_FLUSH_STATS_MS,
119 	CFG_TLC_HT_FLUSH_STATS_MS,
120 	CFG_TLC_STAY_IN_COL_TIME_OUT,
121 	CFG_TLC_AGG_SHORT_LIM,
122 	CFG_TLC_AGG_LONG_LIM,
123 	CFG_TLC_HT_SR_NO_DECREASE,
124 	CFG_TLC_LEGACY_SR_NO_DECREASE,
125 	CFG_TLC_SR_FORCE_DECREASE,
126 	CFG_TLC_SR_ALLOW_INCREASE,
127 	CFG_TLC_AGG_SET_LONG,
128 	CFG_TLC_AUTO_AGGREGATION,
129 	CFG_TLC_AGG_THRESHOLD,
130 	CFG_TLC_TID_LOAD_THRESHOLD,
131 	CFG_TLC_BLOCK_ACK_TIMEOUT,
132 	CFG_TLC_NO_BA_COUNTED_AS_ONE,
133 	CFG_TLC_NUM_BA_STREAMS_ALLOWED,
134 	CFG_TLC_NUM_BA_STREAMS_PRESENT,
135 	CFG_TLC_RENEW_ADDBA_DELAY,
136 	CFG_TLC_NUM_OF_MULTISEC_TO_COUN_LOAD,
137 	CFG_TLC_IS_STABLE_IN_HT,
138 	CFG_TLC_SR_SIC_1ST_FAIL,
139 	CFG_TLC_SR_SIC_1ST_PASS,
140 	CFG_TLC_SR_SIC_TOTAL_FAIL,
141 	CFG_TLC_SR_SIC_TOTAL_PASS,
142 	CFG_RLC_CHAIN_CTRL,
143 	CFG_TRK_TABLE_OP_MODE,
144 	CFG_TRK_TABLE_RSSI_THRESHOLD,
145 	CFG_TX_PWR_TARGET, /* Used By xVT */
146 	CFG_TX_PWR_LIMIT_USR,
147 	CFG_TX_PWR_LIMIT_BSS, /* 11d limit */
148 	CFG_TX_PWR_LIMIT_BSS_CONSTRAINT, /* 11h constraint */
149 	CFG_TX_PWR_MODE,
150 	CFG_MLME_DBG_NOTIF_BLOCK,
151 	CFG_BT_OFF_BECONS_INTERVALS,
152 	CFG_BT_FRAG_DURATION,
153 	CFG_ACTIVE_CHAINS,
154 	CFG_CALIB_CTRL,
155 	CFG_CAPABILITY_SUPPORTED_HT_RATES,
156 	CFG_HT_MAC_PARAM_INFO,
157 	CFG_MIMO_PS_MODE,
158 	CFG_HT_DEFAULT_CAPABILIES_INFO,
159 	CFG_LED_SC_RESOLUTION_FACTOR,
160 	CFG_PTAM_ENERGY_CCK_DET_DEFAULT,
161 	CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_DEFAULT,
162 	CFG_PTAM_CORR40_4_TH_ADD_MIN_DEFAULT,
163 	CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_DEFAULT,
164 	CFG_PTAM_CORR32_4_TH_ADD_MIN_DEFAULT,
165 	CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_DEFAULT,
166 	CFG_PTAM_CORR32_1_TH_ADD_MIN_DEFAULT,
167 	CFG_PTAM_ENERGY_CCK_DET_MIN_VAL,
168 	CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_MIN_VAL,
169 	CFG_PTAM_CORR40_4_TH_ADD_MIN_MIN_VAL,
170 	CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_MIN_VAL,
171 	CFG_PTAM_CORR32_4_TH_ADD_MIN_MIN_VAL,
172 	CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_MIN_VAL,
173 	CFG_PTAM_CORR32_1_TH_ADD_MIN_MIN_VAL,
174 	CFG_PTAM_ENERGY_CCK_DET_MAX_VAL,
175 	CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_MAX_VAL,
176 	CFG_PTAM_CORR40_4_TH_ADD_MIN_MAX_VAL,
177 	CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_MAX_VAL,
178 	CFG_PTAM_CORR32_4_TH_ADD_MIN_MAX_VAL,
179 	CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_MAX_VAL,
180 	CFG_PTAM_CORR32_1_TH_ADD_MIN_MAX_VAL,
181 	CFG_PTAM_ENERGY_CCK_DET_STEP_VAL,
182 	CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_STEP_VAL,
183 	CFG_PTAM_CORR40_4_TH_ADD_MIN_STEP_VAL,
184 	CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_STEP_VAL,
185 	CFG_PTAM_CORR32_4_TH_ADD_MIN_STEP_VAL,
186 	CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_STEP_VAL,
187 	CFG_PTAM_CORR32_1_TH_ADD_MIN_STEP_VAL,
188 	CFG_PTAM_LINK_SENS_FA_OFDM_MAX,
189 	CFG_PTAM_LINK_SENS_FA_OFDM_MIN,
190 	CFG_PTAM_LINK_SENS_FA_CCK_MAX,
191 	CFG_PTAM_LINK_SENS_FA_CCK_MIN,
192 	CFG_PTAM_LINK_SENS_NRG_DIFF,
193 	CFG_PTAM_LINK_SENS_NRG_MARGIN,
194 	CFG_PTAM_LINK_SENS_MAX_NUMBER_OF_TIMES_IN_CCK_NO_FA,
195 	CFG_PTAM_LINK_SENS_AUTO_CORR_MAX_TH_CCK,
196 	CFG_AGG_MGG_TID_LOAD_ADDBA_THRESHOLD,
197 	CFG_AGG_MGG_TID_LOAD_DELBA_THRESHOLD,
198 	CFG_AGG_MGG_ADDBA_BUF_SIZE,
199 	CFG_AGG_MGG_ADDBA_INACTIVE_TIMEOUT,
200 	CFG_AGG_MGG_ADDBA_DEBUG_FLAGS,
201 	CFG_SCAN_PERIODIC_RSSI_HIGH_THRESHOLD,
202 	CFG_SCAN_PERIODIC_COEF_RSSI_HIGH,
203 	CFG_11D_ENABLED,
204 	CFG_11H_FEATURE_FLAGS,
205 
206 	/* <-- LAST --> */
207 	CFG_TBL_FIX_LAST
208 };
209 
210 /* variable size table */
211 enum {
212 	CFG_NET_ADDR = 0,
213 	CFG_LED_PATTERN_TABLE,
214 
215 	/* <-- LAST --> */
216 	CFG_TBL_VAR_LAST
217 };
218 
219 struct iwm_umac_cmd_set_param_fix {
220 	__le16 tbl;
221 	__le16 key;
222 	__le32 value;
223 } __packed;
224 
225 struct iwm_umac_cmd_set_param_var {
226 	__le16 tbl;
227 	__le16 key;
228 	__le16 len;
229 	__le16 reserved;
230 } __packed;
231 
232 struct iwm_umac_cmd_get_param {
233 	__le16 tbl;
234 	__le16 key;
235 } __packed;
236 
237 struct iwm_umac_cmd_get_param_resp {
238 	__le16 tbl;
239 	__le16 key;
240 	__le16 len;
241 	__le16 reserved;
242 } __packed;
243 
244 struct iwm_umac_cmd_eeprom_proxy_hdr {
245 	__le32 type;
246 	__le32 offset;
247 	__le32 len;
248 } __packed;
249 
250 struct iwm_umac_cmd_eeprom_proxy {
251 	struct iwm_umac_cmd_eeprom_proxy_hdr hdr;
252 	u8 buf[0];
253 } __packed;
254 
255 #define IWM_UMAC_CMD_EEPROM_TYPE_READ       0x1
256 #define IWM_UMAC_CMD_EEPROM_TYPE_WRITE      0x2
257 
258 #define UMAC_CHANNEL_FLAG_VALID		BIT(0)
259 #define UMAC_CHANNEL_FLAG_IBSS		BIT(1)
260 #define UMAC_CHANNEL_FLAG_ACTIVE	BIT(3)
261 #define UMAC_CHANNEL_FLAG_RADAR		BIT(4)
262 #define UMAC_CHANNEL_FLAG_DFS		BIT(7)
263 
264 struct iwm_umac_channel_info {
265 	u8 band;
266 	u8 type;
267 	u8 reserved;
268 	u8 flags;
269 	__le32 channels_mask;
270 } __packed;
271 
272 struct iwm_umac_cmd_get_channel_list {
273 	__le16 count;
274 	__le16 reserved;
275 	struct iwm_umac_channel_info ch[0];
276 } __packed;
277 
278 
279 /* UMAC WiFi interface commands */
280 
281 /* Coexistence mode */
282 #define COEX_MODE_SA  0x1
283 #define COEX_MODE_XOR 0x2
284 #define COEX_MODE_CM  0x3
285 #define COEX_MODE_MAX 0x4
286 
287 /* Wireless mode */
288 #define WIRELESS_MODE_11A  0x1
289 #define WIRELESS_MODE_11G  0x2
290 #define WIRELESS_MODE_11N  0x4
291 
292 #define UMAC_PROFILE_EX_IE_REQUIRED	0x1
293 #define UMAC_PROFILE_QOS_ALLOWED	0x2
294 
295 /* Scanning */
296 #define UMAC_WIFI_IF_PROBE_OPTION_MAX        10
297 
298 #define UMAC_WIFI_IF_SCAN_TYPE_USER          0x0
299 #define UMAC_WIFI_IF_SCAN_TYPE_UMAC_RESERVED 0x1
300 #define UMAC_WIFI_IF_SCAN_TYPE_HOST_PERIODIC 0x2
301 #define UMAC_WIFI_IF_SCAN_TYPE_MAX           0x3
302 
303 struct iwm_umac_ssid {
304 	u8 ssid_len;
305 	u8 ssid[IEEE80211_MAX_SSID_LEN];
306 	u8 reserved[3];
307 } __packed;
308 
309 struct iwm_umac_cmd_scan_request {
310 	struct iwm_umac_wifi_if hdr;
311 	__le32 type; /* UMAC_WIFI_IF_SCAN_TYPE_* */
312 	u8 ssid_num;
313 	u8 seq_num;
314 	u8 timeout; /* In seconds */
315 	u8 reserved;
316 	struct iwm_umac_ssid ssids[UMAC_WIFI_IF_PROBE_OPTION_MAX];
317 } __packed;
318 
319 #define UMAC_CIPHER_TYPE_NONE		0xFF
320 #define UMAC_CIPHER_TYPE_USE_GROUPCAST	0x00
321 #define UMAC_CIPHER_TYPE_WEP_40		0x01
322 #define UMAC_CIPHER_TYPE_WEP_104	0x02
323 #define UMAC_CIPHER_TYPE_TKIP		0x04
324 #define UMAC_CIPHER_TYPE_CCMP		0x08
325 
326 /* Supported authentication types - bitmap */
327 #define UMAC_AUTH_TYPE_OPEN		0x00
328 #define UMAC_AUTH_TYPE_LEGACY_PSK	0x01
329 #define UMAC_AUTH_TYPE_8021X		0x02
330 #define UMAC_AUTH_TYPE_RSNA_PSK		0x04
331 
332 /* iwm_umac_security.flag is WPA supported -- bits[0:0] */
333 #define UMAC_SEC_FLG_WPA_ON_POS		0
334 #define UMAC_SEC_FLG_WPA_ON_SEED	1
335 #define UMAC_SEC_FLG_WPA_ON_MSK (UMAC_SEC_FLG_WPA_ON_SEED << \
336 				 UMAC_SEC_FLG_WPA_ON_POS)
337 
338 /* iwm_umac_security.flag is WPA2 supported -- bits [1:1] */
339 #define UMAC_SEC_FLG_RSNA_ON_POS	1
340 #define UMAC_SEC_FLG_RSNA_ON_SEED	1
341 #define UMAC_SEC_FLG_RSNA_ON_MSK        (UMAC_SEC_FLG_RSNA_ON_SEED << \
342 					 UMAC_SEC_FLG_RSNA_ON_POS)
343 
344 /* iwm_umac_security.flag is WSC mode on -- bits [2:2] */
345 #define UMAC_SEC_FLG_WSC_ON_POS		2
346 #define UMAC_SEC_FLG_WSC_ON_SEED	1
347 #define UMAC_SEC_FLG_WSC_ON_MSK         (UMAC_SEC_FLG_WSC_ON_SEED << \
348 					 UMAC_SEC_FLG_WSC_ON_POS)
349 
350 
351 /* Legacy profile can use only WEP40 and WEP104 for encryption and
352  * OPEN or PSK for authentication */
353 #define UMAC_SEC_FLG_LEGACY_PROFILE	0
354 
355 struct iwm_umac_security {
356 	u8 auth_type;
357 	u8 ucast_cipher;
358 	u8 mcast_cipher;
359 	u8 flags;
360 } __packed;
361 
362 struct iwm_umac_ibss {
363 	u8 beacon_interval;	/* in millisecond */
364 	u8 atim;		/* in millisecond */
365 	s8 join_only;
366 	u8 band;
367 	u8 channel;
368 	u8 reserved[3];
369 } __packed;
370 
371 #define UMAC_MODE_BSS	0
372 #define UMAC_MODE_IBSS	1
373 
374 #define UMAC_BSSID_MAX	4
375 
376 struct iwm_umac_profile {
377 	struct iwm_umac_wifi_if hdr;
378 	__le32 mode;
379 	struct iwm_umac_ssid ssid;
380 	u8 bssid[UMAC_BSSID_MAX][ETH_ALEN];
381 	struct iwm_umac_security sec;
382 	struct iwm_umac_ibss ibss;
383 	__le32 channel_2ghz;
384 	__le32 channel_5ghz;
385 	__le16 flags;
386 	u8 wireless_mode;
387 	u8 bss_num;
388 } __packed;
389 
390 struct iwm_umac_invalidate_profile {
391 	struct iwm_umac_wifi_if hdr;
392 	u8 reason;
393 	u8 reserved[3];
394 } __packed;
395 
396 /* Encryption key commands */
397 struct iwm_umac_key_wep40 {
398 	struct iwm_umac_wifi_if hdr;
399 	struct iwm_umac_key_hdr key_hdr;
400 	u8 key[WLAN_KEY_LEN_WEP40];
401 	u8 static_key;
402 	u8 reserved[2];
403 } __packed;
404 
405 struct iwm_umac_key_wep104 {
406 	struct iwm_umac_wifi_if hdr;
407 	struct iwm_umac_key_hdr key_hdr;
408 	u8 key[WLAN_KEY_LEN_WEP104];
409 	u8 static_key;
410 	u8 reserved[2];
411 } __packed;
412 
413 #define IWM_TKIP_KEY_SIZE 16
414 #define IWM_TKIP_MIC_SIZE 8
415 struct iwm_umac_key_tkip {
416 	struct iwm_umac_wifi_if hdr;
417 	struct iwm_umac_key_hdr key_hdr;
418 	u8 iv_count[6];
419 	u8 reserved[2];
420 	u8 tkip_key[IWM_TKIP_KEY_SIZE];
421 	u8 mic_rx_key[IWM_TKIP_MIC_SIZE];
422 	u8 mic_tx_key[IWM_TKIP_MIC_SIZE];
423 } __packed;
424 
425 struct iwm_umac_key_ccmp {
426 	struct iwm_umac_wifi_if hdr;
427 	struct iwm_umac_key_hdr key_hdr;
428 	u8 iv_count[6];
429 	u8 reserved[2];
430 	u8 key[WLAN_KEY_LEN_CCMP];
431 } __packed;
432 
433 struct iwm_umac_key_remove {
434 	struct iwm_umac_wifi_if hdr;
435 	struct iwm_umac_key_hdr key_hdr;
436 } __packed;
437 
438 struct iwm_umac_tx_key_id {
439 	struct iwm_umac_wifi_if hdr;
440 	u8 key_idx;
441 	u8 reserved[3];
442 } __packed;
443 
444 struct iwm_umac_pwr_trigger {
445 	struct iwm_umac_wifi_if hdr;
446 	__le32 reseved;
447 } __packed;
448 
449 struct iwm_umac_cmd_stats_req {
450 	__le32 flags;
451 } __packed;
452 
453 struct iwm_umac_cmd_stop_resume_tx {
454 	u8 flags;
455 	u8 sta_id;
456 	__le16 stop_resume_tid_msk;
457 	__le16 last_seq_num[IWM_UMAC_TID_NR];
458 	u16 reserved;
459 } __packed;
460 
461 #define IWM_CMD_PMKID_ADD   1
462 #define IWM_CMD_PMKID_DEL   2
463 #define IWM_CMD_PMKID_FLUSH 3
464 
465 struct iwm_umac_pmkid_update {
466 	struct iwm_umac_wifi_if hdr;
467 	__le32 command;
468 	u8 bssid[ETH_ALEN];
469 	__le16 reserved;
470 	u8 pmkid[WLAN_PMKID_LEN];
471 } __packed;
472 
473 /* LMAC commands */
474 int iwm_read_mac(struct iwm_priv *iwm, u8 *mac);
475 int iwm_send_prio_table(struct iwm_priv *iwm);
476 int iwm_send_init_calib_cfg(struct iwm_priv *iwm, u8 calib_requested);
477 int iwm_send_periodic_calib_cfg(struct iwm_priv *iwm, u8 calib_requested);
478 int iwm_send_calib_results(struct iwm_priv *iwm);
479 int iwm_store_rxiq_calib_result(struct iwm_priv *iwm);
480 int iwm_send_ct_kill_cfg(struct iwm_priv *iwm, u8 entry, u8 exit);
481 
482 /* UMAC commands */
483 int iwm_send_wifi_if_cmd(struct iwm_priv *iwm, void *payload, u16 payload_size,
484 			 bool resp);
485 int iwm_send_umac_reset(struct iwm_priv *iwm, __le32 reset_flags, bool resp);
486 int iwm_umac_set_config_fix(struct iwm_priv *iwm, u16 tbl, u16 key, u32 value);
487 int iwm_umac_set_config_var(struct iwm_priv *iwm, u16 key,
488 			    void *payload, u16 payload_size);
489 int iwm_send_umac_config(struct iwm_priv *iwm, __le32 reset_flags);
490 int iwm_send_mlme_profile(struct iwm_priv *iwm);
491 int __iwm_invalidate_mlme_profile(struct iwm_priv *iwm);
492 int iwm_invalidate_mlme_profile(struct iwm_priv *iwm);
493 int iwm_send_packet(struct iwm_priv *iwm, struct sk_buff *skb, int pool_id);
494 int iwm_set_tx_key(struct iwm_priv *iwm, u8 key_idx);
495 int iwm_set_key(struct iwm_priv *iwm, bool remove, struct iwm_key *key);
496 int iwm_tx_power_trigger(struct iwm_priv *iwm);
497 int iwm_send_umac_stats_req(struct iwm_priv *iwm, u32 flags);
498 int iwm_send_umac_channel_list(struct iwm_priv *iwm);
499 int iwm_scan_ssids(struct iwm_priv *iwm, struct cfg80211_ssid *ssids,
500 		   int ssid_num);
501 int iwm_scan_one_ssid(struct iwm_priv *iwm, u8 *ssid, int ssid_len);
502 int iwm_send_umac_stop_resume_tx(struct iwm_priv *iwm,
503 				 struct iwm_umac_notif_stop_resume_tx *ntf);
504 int iwm_send_pmkid_update(struct iwm_priv *iwm,
505 			  struct cfg80211_pmksa *pmksa, u32 command);
506 
507 /* UDMA commands */
508 int iwm_target_reset(struct iwm_priv *iwm);
509 #endif
510