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/arch/blackfin/mach-bf548/include/mach/
DcdefBF544.h18 #define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG, val) argument
20 #define bfin_write_TIMER8_COUNTER(val) bfin_write32(TIMER8_COUNTER, val) argument
22 #define bfin_write_TIMER8_PERIOD(val) bfin_write32(TIMER8_PERIOD, val) argument
24 #define bfin_write_TIMER8_WIDTH(val) bfin_write32(TIMER8_WIDTH, val) argument
26 #define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG, val) argument
28 #define bfin_write_TIMER9_COUNTER(val) bfin_write32(TIMER9_COUNTER, val) argument
30 #define bfin_write_TIMER9_PERIOD(val) bfin_write32(TIMER9_PERIOD, val) argument
32 #define bfin_write_TIMER9_WIDTH(val) bfin_write32(TIMER9_WIDTH, val) argument
34 #define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG, val) argument
36 #define bfin_write_TIMER10_COUNTER(val) bfin_write32(TIMER10_COUNTER, val) argument
[all …]
DcdefBF54x_base.h18 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val) argument
21 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val) argument
23 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val) argument
28 #define bfin_write_CHIPID(val) bfin_write32(CHIPID, val) argument
33 #define bfin_write_SWRST(val) bfin_write16(SWRST, val) argument
35 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val) argument
40 #define bfin_write_SIC_RVECT(val) bfin_write32(SIC_RVECT, val) argument
42 #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val) argument
44 #define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val) argument
46 #define bfin_write_SIC_IMASK2(val) bfin_write32(SIC_IMASK2, val) argument
[all …]
DcdefBF548.h19 #define bfin_write_CAN1_MC1(val) bfin_write16(CAN1_MC1, val) argument
21 #define bfin_write_CAN1_MD1(val) bfin_write16(CAN1_MD1, val) argument
23 #define bfin_write_CAN1_TRS1(val) bfin_write16(CAN1_TRS1, val) argument
25 #define bfin_write_CAN1_TRR1(val) bfin_write16(CAN1_TRR1, val) argument
27 #define bfin_write_CAN1_TA1(val) bfin_write16(CAN1_TA1, val) argument
29 #define bfin_write_CAN1_AA1(val) bfin_write16(CAN1_AA1, val) argument
31 #define bfin_write_CAN1_RMP1(val) bfin_write16(CAN1_RMP1, val) argument
33 #define bfin_write_CAN1_RML1(val) bfin_write16(CAN1_RML1, val) argument
35 #define bfin_write_CAN1_MBTIF1(val) bfin_write16(CAN1_MBTIF1, val) argument
37 #define bfin_write_CAN1_MBRIF1(val) bfin_write16(CAN1_MBRIF1, val) argument
[all …]
DcdefBF542.h18 #define bfin_write_ATAPI_CONTROL(val) bfin_write16(ATAPI_CONTROL, val) argument
20 #define bfin_write_ATAPI_STATUS(val) bfin_write16(ATAPI_STATUS, val) argument
22 #define bfin_write_ATAPI_DEV_ADDR(val) bfin_write16(ATAPI_DEV_ADDR, val) argument
24 #define bfin_write_ATAPI_DEV_TXBUF(val) bfin_write16(ATAPI_DEV_TXBUF, val) argument
26 #define bfin_write_ATAPI_DEV_RXBUF(val) bfin_write16(ATAPI_DEV_RXBUF, val) argument
28 #define bfin_write_ATAPI_INT_MASK(val) bfin_write16(ATAPI_INT_MASK, val) argument
30 #define bfin_write_ATAPI_INT_STATUS(val) bfin_write16(ATAPI_INT_STATUS, val) argument
32 #define bfin_write_ATAPI_XFER_LEN(val) bfin_write16(ATAPI_XFER_LEN, val) argument
34 #define bfin_write_ATAPI_LINE_STATUS(val) bfin_write16(ATAPI_LINE_STATUS, val) argument
36 #define bfin_write_ATAPI_SM_STATE(val) bfin_write16(ATAPI_SM_STATE, val) argument
[all …]
DcdefBF547.h18 #define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG, val) argument
20 #define bfin_write_TIMER8_COUNTER(val) bfin_write32(TIMER8_COUNTER, val) argument
22 #define bfin_write_TIMER8_PERIOD(val) bfin_write32(TIMER8_PERIOD, val) argument
24 #define bfin_write_TIMER8_WIDTH(val) bfin_write32(TIMER8_WIDTH, val) argument
26 #define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG, val) argument
28 #define bfin_write_TIMER9_COUNTER(val) bfin_write32(TIMER9_COUNTER, val) argument
30 #define bfin_write_TIMER9_PERIOD(val) bfin_write32(TIMER9_PERIOD, val) argument
32 #define bfin_write_TIMER9_WIDTH(val) bfin_write32(TIMER9_WIDTH, val) argument
34 #define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG, val) argument
36 #define bfin_write_TIMER10_COUNTER(val) bfin_write32(TIMER10_COUNTER, val) argument
[all …]
DcdefBF549.h19 #define bfin_write_MXVR_CONFIG(val) bfin_write16(MXVR_CONFIG, val) argument
21 #define bfin_write_MXVR_STATE_0(val) bfin_write32(MXVR_STATE_0, val) argument
23 #define bfin_write_MXVR_STATE_1(val) bfin_write32(MXVR_STATE_1, val) argument
25 #define bfin_write_MXVR_INT_STAT_0(val) bfin_write32(MXVR_INT_STAT_0, val) argument
27 #define bfin_write_MXVR_INT_STAT_1(val) bfin_write32(MXVR_INT_STAT_1, val) argument
29 #define bfin_write_MXVR_INT_EN_0(val) bfin_write32(MXVR_INT_EN_0, val) argument
31 #define bfin_write_MXVR_INT_EN_1(val) bfin_write32(MXVR_INT_EN_1, val) argument
33 #define bfin_write_MXVR_POSITION(val) bfin_write16(MXVR_POSITION, val) argument
35 #define bfin_write_MXVR_MAX_POSITION(val) bfin_write16(MXVR_MAX_POSITION, val) argument
37 #define bfin_write_MXVR_DELAY(val) bfin_write16(MXVR_DELAY, val) argument
[all …]
/arch/blackfin/mach-bf518/include/mach/
DcdefBF512.h13 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val) argument
16 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val) argument
18 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val) argument
20 #define bfin_write_CHIPID(val) bfin_write32(CHIPID, val) argument
25 #define bfin_write_SWRST(val) bfin_write16(SWRST, val) argument
27 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val) argument
30 #define bfin_write_SIC_RVECT(val) bfin_write32(SIC_RVECT, val) argument
32 #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val) argument
34 #define bfin_write_SIC_IMASK(x, val) bfin_write32((SIC_IMASK0 + (x << 6)), val) argument
37 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val) argument
[all …]
DcdefBF516.h16 #define bfin_write_EMAC_OPMODE(val) bfin_write32(EMAC_OPMODE, val) argument
18 #define bfin_write_EMAC_ADDRLO(val) bfin_write32(EMAC_ADDRLO, val) argument
20 #define bfin_write_EMAC_ADDRHI(val) bfin_write32(EMAC_ADDRHI, val) argument
22 #define bfin_write_EMAC_HASHLO(val) bfin_write32(EMAC_HASHLO, val) argument
24 #define bfin_write_EMAC_HASHHI(val) bfin_write32(EMAC_HASHHI, val) argument
26 #define bfin_write_EMAC_STAADD(val) bfin_write32(EMAC_STAADD, val) argument
28 #define bfin_write_EMAC_STADAT(val) bfin_write32(EMAC_STADAT, val) argument
30 #define bfin_write_EMAC_FLC(val) bfin_write32(EMAC_FLC, val) argument
32 #define bfin_write_EMAC_VLAN1(val) bfin_write32(EMAC_VLAN1, val) argument
34 #define bfin_write_EMAC_VLAN2(val) bfin_write32(EMAC_VLAN2, val) argument
[all …]
DcdefBF514.h16 #define bfin_write_RSI_PWR_CTL(val) bfin_write16(RSI_PWR_CONTROL, val) argument
18 #define bfin_write_RSI_CLK_CTL(val) bfin_write16(RSI_CLK_CONTROL, val) argument
20 #define bfin_write_RSI_ARGUMENT(val) bfin_write32(RSI_ARGUMENT, val) argument
22 #define bfin_write_RSI_COMMAND(val) bfin_write16(RSI_COMMAND, val) argument
24 #define bfin_write_RSI_RESP_CMD(val) bfin_write16(RSI_RESP_CMD, val) argument
26 #define bfin_write_RSI_RESPONSE0(val) bfin_write32(RSI_RESPONSE0, val) argument
28 #define bfin_write_RSI_RESPONSE1(val) bfin_write32(RSI_RESPONSE1, val) argument
30 #define bfin_write_RSI_RESPONSE2(val) bfin_write32(RSI_RESPONSE2, val) argument
32 #define bfin_write_RSI_RESPONSE3(val) bfin_write32(RSI_RESPONSE3, val) argument
34 #define bfin_write_RSI_DATA_TIMER(val) bfin_write32(RSI_DATA_TIMER, val) argument
[all …]
DcdefBF518.h16 #define bfin_write_EMAC_PTP_CTL(val) bfin_write16(EMAC_PTP_CTL, val) argument
18 #define bfin_write_EMAC_PTP_IE(val) bfin_write16(EMAC_PTP_IE, val) argument
20 #define bfin_write_EMAC_PTP_ISTAT(val) bfin_write16(EMAC_PTP_ISTAT, val) argument
22 #define bfin_write_EMAC_PTP_FOFF(val) bfin_write32(EMAC_PTP_FOFF, val) argument
24 #define bfin_write_EMAC_PTP_FV1(val) bfin_write32(EMAC_PTP_FV1, val) argument
26 #define bfin_write_EMAC_PTP_FV2(val) bfin_write32(EMAC_PTP_FV2, val) argument
28 #define bfin_write_EMAC_PTP_FV3(val) bfin_write32(EMAC_PTP_FV3, val) argument
30 #define bfin_write_EMAC_PTP_ADDEND(val) bfin_write32(EMAC_PTP_ADDEND, val) argument
32 #define bfin_write_EMAC_PTP_ACCR(val) bfin_write32(EMAC_PTP_ACCR, val) argument
34 #define bfin_write_EMAC_PTP_OFFSET(val) bfin_write32(EMAC_PTP_OFFSET, val) argument
[all …]
/arch/blackfin/mach-bf533/include/mach/
DcdefBF532.h13 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val) argument
15 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val) argument
18 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val) argument
23 #define bfin_write_SWRST(val) bfin_write16(SWRST,val) argument
25 #define bfin_write_SYSCR(val) bfin_write16(SYSCR,val) argument
27 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0,val) argument
29 #define bfin_write_SIC_IAR1(val) bfin_write32(SIC_IAR1,val) argument
31 #define bfin_write_SIC_IAR2(val) bfin_write32(SIC_IAR2,val) argument
33 #define bfin_write_SIC_IAR3(val) bfin_write32(SIC_IAR3,val) argument
35 #define bfin_write_SIC_IMASK(val) bfin_write32(SIC_IMASK,val) argument
[all …]
/arch/blackfin/mach-bf538/include/mach/
DcdefBF539.h14 #define bfin_write_MXVR_CONFIG(val) bfin_write16(MXVR_CONFIG, val) argument
16 #define bfin_write_MXVR_PLL_CTL_0(val) bfin_write32(MXVR_PLL_CTL_0, val) argument
18 #define bfin_write_MXVR_STATE_0(val) bfin_write32(MXVR_STATE_0, val) argument
20 #define bfin_write_MXVR_STATE_1(val) bfin_write32(MXVR_STATE_1, val) argument
22 #define bfin_write_MXVR_INT_STAT_0(val) bfin_write32(MXVR_INT_STAT_0, val) argument
24 #define bfin_write_MXVR_INT_STAT_1(val) bfin_write32(MXVR_INT_STAT_1, val) argument
26 #define bfin_write_MXVR_INT_EN_0(val) bfin_write32(MXVR_INT_EN_0, val) argument
28 #define bfin_write_MXVR_INT_EN_1(val) bfin_write32(MXVR_INT_EN_1, val) argument
30 #define bfin_write_MXVR_POSITION(val) bfin_write16(MXVR_POSITION, val) argument
32 #define bfin_write_MXVR_MAX_POSITION(val) bfin_write16(MXVR_MAX_POSITION, val) argument
[all …]
DcdefBF538.h10 #define bfin_writePTR(addr, val) bfin_write32(addr, val) argument
14 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val) argument
17 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val) argument
19 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val) argument
21 #define bfin_write_CHIPID(val) bfin_write32(CHIPID, val) argument
23 #define bfin_write_SWRST(val) bfin_write16(SWRST, val) argument
25 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val) argument
27 #define bfin_write_SIC_RVECT(val) bfin_writePTR(SIC_RVECT, val) argument
29 #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val) argument
31 #define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val) argument
[all …]
/arch/blackfin/mach-bf537/include/mach/
DcdefBF534.h13 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val) argument
16 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val) argument
18 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val) argument
23 #define bfin_write_SWRST(val) bfin_write16(SWRST,val) argument
25 #define bfin_write_SYSCR(val) bfin_write16(SYSCR,val) argument
27 #define bfin_write_SIC_RVECT(val) bfin_write32(SIC_RVECT,val) argument
29 #define bfin_write_SIC_IMASK(val) bfin_write32(SIC_IMASK,val) argument
31 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0,val) argument
33 #define bfin_write_SIC_IAR1(val) bfin_write32(SIC_IAR1,val) argument
35 #define bfin_write_SIC_IAR2(val) bfin_write32(SIC_IAR2,val) argument
[all …]
DcdefBF537.h16 #define bfin_write_EMAC_OPMODE(val) bfin_write32(EMAC_OPMODE,val) argument
18 #define bfin_write_EMAC_ADDRLO(val) bfin_write32(EMAC_ADDRLO,val) argument
20 #define bfin_write_EMAC_ADDRHI(val) bfin_write32(EMAC_ADDRHI,val) argument
22 #define bfin_write_EMAC_HASHLO(val) bfin_write32(EMAC_HASHLO,val) argument
24 #define bfin_write_EMAC_HASHHI(val) bfin_write32(EMAC_HASHHI,val) argument
26 #define bfin_write_EMAC_STAADD(val) bfin_write32(EMAC_STAADD,val) argument
28 #define bfin_write_EMAC_STADAT(val) bfin_write32(EMAC_STADAT,val) argument
30 #define bfin_write_EMAC_FLC(val) bfin_write32(EMAC_FLC,val) argument
32 #define bfin_write_EMAC_VLAN1(val) bfin_write32(EMAC_VLAN1,val) argument
34 #define bfin_write_EMAC_VLAN2(val) bfin_write32(EMAC_VLAN2,val) argument
[all …]
/arch/blackfin/mach-bf561/include/mach/
DcdefBF561.h17 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val) argument
20 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val) argument
22 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val) argument
27 #define bfin_write_SWRST(val) bfin_write16(SWRST,val) argument
29 #define bfin_write_SYSCR(val) bfin_write16(SYSCR,val) argument
31 #define bfin_write_SIC_RVECT(val) bfin_write16(SIC_RVECT,val) argument
33 #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0,val) argument
35 #define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1,val) argument
37 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0,val) argument
39 #define bfin_write_SIC_IAR1(val) bfin_write32(SIC_IAR1,val) argument
[all …]
/arch/blackfin/mach-bf527/include/mach/
DcdefBF522.h13 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val) argument
16 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val) argument
18 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val) argument
20 #define bfin_write_CHIPID(val) bfin_write32(CHIPID, val) argument
25 #define bfin_write_SWRST(val) bfin_write16(SWRST, val) argument
27 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val) argument
30 #define bfin_write_SIC_RVECT(val) bfin_write32(SIC_RVECT, val) argument
32 #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val) argument
34 #define bfin_write_SIC_IMASK(x, val) bfin_write32((SIC_IMASK0 + (x << 6)), val) argument
37 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val) argument
[all …]
DcdefBF525.h16 #define bfin_write_USB_FADDR(val) bfin_write16(USB_FADDR, val) argument
18 #define bfin_write_USB_POWER(val) bfin_write16(USB_POWER, val) argument
20 #define bfin_write_USB_INTRTX(val) bfin_write16(USB_INTRTX, val) argument
22 #define bfin_write_USB_INTRRX(val) bfin_write16(USB_INTRRX, val) argument
24 #define bfin_write_USB_INTRTXE(val) bfin_write16(USB_INTRTXE, val) argument
26 #define bfin_write_USB_INTRRXE(val) bfin_write16(USB_INTRRXE, val) argument
28 #define bfin_write_USB_INTRUSB(val) bfin_write16(USB_INTRUSB, val) argument
30 #define bfin_write_USB_INTRUSBE(val) bfin_write16(USB_INTRUSBE, val) argument
32 #define bfin_write_USB_FRAME(val) bfin_write16(USB_FRAME, val) argument
34 #define bfin_write_USB_INDEX(val) bfin_write16(USB_INDEX, val) argument
[all …]
DcdefBF527.h16 #define bfin_write_EMAC_OPMODE(val) bfin_write32(EMAC_OPMODE, val) argument
18 #define bfin_write_EMAC_ADDRLO(val) bfin_write32(EMAC_ADDRLO, val) argument
20 #define bfin_write_EMAC_ADDRHI(val) bfin_write32(EMAC_ADDRHI, val) argument
22 #define bfin_write_EMAC_HASHLO(val) bfin_write32(EMAC_HASHLO, val) argument
24 #define bfin_write_EMAC_HASHHI(val) bfin_write32(EMAC_HASHHI, val) argument
26 #define bfin_write_EMAC_STAADD(val) bfin_write32(EMAC_STAADD, val) argument
28 #define bfin_write_EMAC_STADAT(val) bfin_write32(EMAC_STADAT, val) argument
30 #define bfin_write_EMAC_FLC(val) bfin_write32(EMAC_FLC, val) argument
32 #define bfin_write_EMAC_VLAN1(val) bfin_write32(EMAC_VLAN1, val) argument
34 #define bfin_write_EMAC_VLAN2(val) bfin_write32(EMAC_VLAN2, val) argument
[all …]
/arch/blackfin/include/asm/
Dcdef_LPBlackfin.h18 #define bfin_write_SRAM_BASE_ADDRESS(val) bfin_write32(SRAM_BASE_ADDRESS,val) argument
20 #define bfin_write_DMEM_CONTROL(val) bfin_write32(DMEM_CONTROL,val) argument
22 #define bfin_write_DCPLB_STATUS(val) bfin_write32(DCPLB_STATUS,val) argument
24 #define bfin_write_DCPLB_FAULT_ADDR(val) bfin_write32(DCPLB_FAULT_ADDR,val) argument
29 #define bfin_write_DCPLB_ADDR0(val) bfin_write32(DCPLB_ADDR0,val) argument
31 #define bfin_write_DCPLB_ADDR1(val) bfin_write32(DCPLB_ADDR1,val) argument
33 #define bfin_write_DCPLB_ADDR2(val) bfin_write32(DCPLB_ADDR2,val) argument
35 #define bfin_write_DCPLB_ADDR3(val) bfin_write32(DCPLB_ADDR3,val) argument
37 #define bfin_write_DCPLB_ADDR4(val) bfin_write32(DCPLB_ADDR4,val) argument
39 #define bfin_write_DCPLB_ADDR5(val) bfin_write32(DCPLB_ADDR5,val) argument
[all …]
/arch/alpha/lib/
Dfpreg.c8 #define STT(reg,val) asm volatile ("ftoit $f"#reg",%0" : "=r"(val)); argument
10 #define STT(reg,val) asm volatile ("stt $f"#reg",%0" : "=m"(val)); argument
16 unsigned long val; in alpha_read_fp_reg() local
57 #define LDT(reg,val) asm volatile ("itoft %0,$f"#reg : : "r"(val)); argument
59 #define LDT(reg,val) asm volatile ("ldt $f"#reg",%0" : : "m"(val)); argument
63 alpha_write_fp_reg (unsigned long reg, unsigned long val) in alpha_write_fp_reg()
102 #define STS(reg,val) asm volatile ("ftois $f"#reg",%0" : "=r"(val)); argument
104 #define STS(reg,val) asm volatile ("sts $f"#reg",%0" : "=m"(val)); argument
110 unsigned long val; in alpha_read_fp_reg_s() local
151 #define LDS(reg,val) asm volatile ("itofs %0,$f"#reg : : "r"(val)); argument
[all …]
/arch/arm/mach-iop13xx/
Dirq.c34 u32 val; in read_intctl_0() local
38 static void write_intctl_0(u32 val) in write_intctl_0()
47 u32 val; in read_intctl_1() local
51 static void write_intctl_1(u32 val) in write_intctl_1()
60 u32 val; in read_intctl_2() local
64 static void write_intctl_2(u32 val) in write_intctl_2()
73 u32 val; in read_intctl_3() local
77 static void write_intctl_3(u32 val) in write_intctl_3()
84 static void write_intstr_0(u32 val) in write_intstr_0()
91 static void write_intstr_1(u32 val) in write_intstr_1()
[all …]
/arch/s390/include/asm/
Dpercpu.h22 #define arch_this_cpu_to_op(pcp, val, op) \ argument
44 #define this_cpu_add_1(pcp, val) arch_this_cpu_to_op(pcp, val, +) argument
45 #define this_cpu_add_2(pcp, val) arch_this_cpu_to_op(pcp, val, +) argument
46 #define this_cpu_add_4(pcp, val) arch_this_cpu_to_op(pcp, val, +) argument
47 #define this_cpu_add_8(pcp, val) arch_this_cpu_to_op(pcp, val, +) argument
49 #define this_cpu_and_1(pcp, val) arch_this_cpu_to_op(pcp, val, &) argument
50 #define this_cpu_and_2(pcp, val) arch_this_cpu_to_op(pcp, val, &) argument
51 #define this_cpu_and_4(pcp, val) arch_this_cpu_to_op(pcp, val, &) argument
52 #define this_cpu_and_8(pcp, val) arch_this_cpu_to_op(pcp, val, &) argument
54 #define this_cpu_or_1(pcp, val) arch_this_cpu_to_op(pcp, val, |) argument
[all …]
/arch/x86/include/asm/
Dpercpu.h90 #define percpu_to_op(op, var, val) \ argument
127 #define percpu_add_op(var, val) \ argument
237 #define percpu_add_return_op(var, val) \ argument
364 #define percpu_write(var, val) percpu_to_op("mov", var, val) argument
365 #define percpu_add(var, val) percpu_add_op(var, val) argument
366 #define percpu_sub(var, val) percpu_add_op(var, -(val)) argument
367 #define percpu_and(var, val) percpu_to_op("and", var, val) argument
368 #define percpu_or(var, val) percpu_to_op("or", var, val) argument
369 #define percpu_xor(var, val) percpu_to_op("xor", var, val) argument
376 #define __this_cpu_write_1(pcp, val) percpu_to_op("mov", (pcp), val) argument
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/arch/alpha/include/asm/
Dcompiler.h13 # define __kernel_insbl(val, shift) __builtin_alpha_insbl(val, shift) argument
14 # define __kernel_inswl(val, shift) __builtin_alpha_inswl(val, shift) argument
15 # define __kernel_insql(val, shift) __builtin_alpha_insql(val, shift) argument
16 # define __kernel_inslh(val, shift) __builtin_alpha_inslh(val, shift) argument
17 # define __kernel_extbl(val, shift) __builtin_alpha_extbl(val, shift) argument
18 # define __kernel_extwl(val, shift) __builtin_alpha_extwl(val, shift) argument
21 # define __kernel_insbl(val, shift) \ argument
25 # define __kernel_inswl(val, shift) \ argument
29 # define __kernel_insql(val, shift) \ argument
33 # define __kernel_inslh(val, shift) \ argument
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