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/arch/cris/include/arch-v10/arch/
Dio.h41 #define CRIS_LED_NETWORK_SET_G(x) argument
42 #define CRIS_LED_NETWORK_SET_R(x) argument
43 #define CRIS_LED_ACTIVE_SET_G(x) argument
44 #define CRIS_LED_ACTIVE_SET_R(x) argument
45 #define CRIS_LED_DISK_WRITE(x) argument
46 #define CRIS_LED_DISK_READ(x) argument
50 #define CRIS_LED_BIT_SET(x) argument
51 #define CRIS_LED_BIT_CLR(x) argument
60 #define CRIS_LED_NETWORK_SET(x) argument
63 #define CRIS_LED_NETWORK_SET(x) \ argument
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/arch/sh/include/mach-common/mach/
Dmangle-port.h27 # define ioswabb(x) (x) argument
28 # define __mem_ioswabb(x) (x) argument
29 # define ioswabw(x) le16_to_cpu(x) argument
30 # define __mem_ioswabw(x) (x) argument
31 # define ioswabl(x) le32_to_cpu(x) argument
32 # define __mem_ioswabl(x) (x) argument
33 # define ioswabq(x) le64_to_cpu(x) argument
34 # define __mem_ioswabq(x) (x) argument
38 # define ioswabb(x) (x) argument
39 # define __mem_ioswabb(x) (x) argument
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/arch/mips/include/asm/sibyte/
Dsb1250_genbus.h58 #define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x, S_IO_WIDTH_SEL) argument
59 #define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x, S_IO_WIDTH_SEL, M_IO_WIDTH_SEL) argument
75 #define V_IO_TIMEOUT(x) _SB_MAKEVALUE(x, S_IO_TIMEOUT) argument
76 #define G_IO_TIMEOUT(x) _SB_GETVALUE(x, S_IO_TIMEOUT, M_IO_TIMEOUT) argument
84 #define V_IO_MULT_SIZE(x) _SB_MAKEVALUE(x, S_IO_MULT_SIZE) argument
85 #define G_IO_MULT_SIZE(x) _SB_GETVALUE(x, S_IO_MULT_SIZE, M_IO_MULT_SIZE) argument
95 #define V_IO_START_ADDR(x) _SB_MAKEVALUE(x, S_IO_START_ADDR) argument
96 #define G_IO_START_ADDR(x) _SB_GETVALUE(x, S_IO_START_ADDR, M_IO_START_ADDR) argument
109 #define V_IO_ALE_WIDTH(x) _SB_MAKEVALUE(x, S_IO_ALE_WIDTH) argument
110 #define G_IO_ALE_WIDTH(x) _SB_GETVALUE(x, S_IO_ALE_WIDTH, M_IO_ALE_WIDTH) argument
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Dbcm1480_mc.h44 #define V_BCM1480_MC_INTLV0(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV0) argument
45 #define G_BCM1480_MC_INTLV0(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV0, M_BCM1480_MC_INTLV… argument
50 #define V_BCM1480_MC_INTLV1(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV1) argument
51 #define G_BCM1480_MC_INTLV1(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV1, M_BCM1480_MC_INTLV… argument
56 #define V_BCM1480_MC_INTLV2(x) _SB_MAKEVALUE(x, S_BCM1480_MC_INTLV2) argument
57 #define G_BCM1480_MC_INTLV2(x) _SB_GETVALUE(x, S_BCM1480_MC_INTLV2, M_BCM1480_MC_INTLV… argument
62 #define V_BCM1480_MC_CS_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS_MODE) argument
63 #define G_BCM1480_MC_CS_MODE(x) _SB_GETVALUE(x, S_BCM1480_MC_CS_MODE, M_BCM1480_MC_CS_M… argument
85 #define V_BCM1480_MC_CS0_START(x) _SB_MAKEVALUE(x, S_BCM1480_MC_CS0_START) argument
86 #define G_BCM1480_MC_CS0_START(x) _SB_GETVALUE(x, S_BCM1480_MC_CS0_START, M_BCM1480_MC_CS… argument
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Dbcm1480_l2c.h44 #define V_BCM1480_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_INDEX) argument
45 #define G_BCM1480_L2C_MGMT_INDEX(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_INDEX, M_BCM1480_L2C… argument
49 #define V_BCM1480_L2C_MGMT_WAY(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_WAY) argument
50 #define G_BCM1480_L2C_MGMT_WAY(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_WAY, M_BCM1480_L2C_M… argument
57 #define V_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_MGMT_ECC_DIAG) argument
58 #define G_BCM1480_L2C_MGMT_ECC_DIAG(x) _SB_GETVALUE(x, S_BCM1480_L2C_MGMT_ECC_DIAG, M_BCM1480_… argument
75 #define V_BCM1480_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_INDEX) argument
76 #define G_BCM1480_L2C_TAG_INDEX(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_INDEX, M_BCM1480_L2C_… argument
81 #define V_BCM1480_L2C_TAG_TAG(x) _SB_MAKEVALUE(x, S_BCM1480_L2C_TAG_TAG) argument
82 #define G_BCM1480_L2C_TAG_TAG(x) _SB_GETVALUE(x, S_BCM1480_L2C_TAG_TAG, M_BCM1480_L2C_TA… argument
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Dsb1250_mc.h47 #define V_MC_CHANNEL_SEL(x) _SB_MAKEVALUE(x, S_MC_CHANNEL_SEL) argument
48 #define G_MC_CHANNEL_SEL(x) _SB_GETVALUE(x, S_MC_CHANNEL_SEL, M_MC_CHANNEL_SEL) argument
52 #define V_MC_BANK0_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK0_MAP) argument
53 #define G_MC_BANK0_MAP(x) _SB_GETVALUE(x, S_MC_BANK0_MAP, M_MC_BANK0_MAP) argument
60 #define V_MC_BANK1_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK1_MAP) argument
61 #define G_MC_BANK1_MAP(x) _SB_GETVALUE(x, S_MC_BANK1_MAP, M_MC_BANK1_MAP) argument
68 #define V_MC_BANK2_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK2_MAP) argument
69 #define G_MC_BANK2_MAP(x) _SB_GETVALUE(x, S_MC_BANK2_MAP, M_MC_BANK2_MAP) argument
76 #define V_MC_BANK3_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK3_MAP) argument
77 #define G_MC_BANK3_MAP(x) _SB_GETVALUE(x, S_MC_BANK3_MAP, M_MC_BANK3_MAP) argument
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Dsb1250_ldt.h85 #define V_LDT_DEVICEID_VENDOR(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_VENDOR) argument
86 #define G_LDT_DEVICEID_VENDOR(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_VENDOR, M_LDT_DEVICEID_VENDOR) argument
90 #define V_LDT_DEVICEID_DEVICEID(x) _SB_MAKEVALUE_32(x, S_LDT_DEVICEID_DEVICEID) argument
91 #define G_LDT_DEVICEID_DEVICEID(x) _SB_GETVALUE_32(x, S_LDT_DEVICEID_DEVICEID, M_LDT_DEVICEID_DEVIC… argument
115 #define V_LDT_CLASSREV_REV(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_REV) argument
116 #define G_LDT_CLASSREV_REV(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_REV, M_LDT_CLASSREV_REV) argument
120 #define V_LDT_CLASSREV_CLASS(x) _SB_MAKEVALUE_32(x, S_LDT_CLASSREV_CLASS) argument
121 #define G_LDT_CLASSREV_CLASS(x) _SB_GETVALUE_32(x, S_LDT_CLASSREV_CLASS, M_LDT_CLASSREV_CLASS) argument
132 #define V_LDT_DEVHDR_CLINESZ(x) _SB_MAKEVALUE_32(x, S_LDT_DEVHDR_CLINESZ) argument
133 #define G_LDT_DEVHDR_CLINESZ(x) _SB_GETVALUE_32(x, S_LDT_DEVHDR_CLINESZ, M_LDT_DEVHDR_CLINESZ) argument
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Dsb1250_l2c.h47 #define V_L2C_TAG_INDEX(x) _SB_MAKEVALUE(x, S_L2C_TAG_INDEX) argument
48 #define G_L2C_TAG_INDEX(x) _SB_GETVALUE(x, S_L2C_TAG_INDEX, M_L2C_TAG_INDEX) argument
52 #define V_L2C_TAG_TAG(x) _SB_MAKEVALUE(x, S_L2C_TAG_TAG) argument
53 #define G_L2C_TAG_TAG(x) _SB_GETVALUE(x, S_L2C_TAG_TAG, M_L2C_TAG_TAG) argument
57 #define V_L2C_TAG_ECC(x) _SB_MAKEVALUE(x, S_L2C_TAG_ECC) argument
58 #define G_L2C_TAG_ECC(x) _SB_GETVALUE(x, S_L2C_TAG_ECC, M_L2C_TAG_ECC) argument
62 #define V_L2C_TAG_WAY(x) _SB_MAKEVALUE(x, S_L2C_TAG_WAY) argument
63 #define G_L2C_TAG_WAY(x) _SB_GETVALUE(x, S_L2C_TAG_WAY, M_L2C_TAG_WAY) argument
74 #define V_L2C_MGMT_INDEX(x) _SB_MAKEVALUE(x, S_L2C_MGMT_INDEX) argument
75 #define G_L2C_MGMT_INDEX(x) _SB_GETVALUE(x, S_L2C_MGMT_INDEX, M_L2C_MGMT_INDEX) argument
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Dsb1250_scd.h49 #define V_SYS_REVISION(x) _SB_MAKEVALUE(x, S_SYS_REVISION) argument
50 #define G_SYS_REVISION(x) _SB_GETVALUE(x, S_SYS_REVISION, M_SYS_REVISION) argument
98 #define V_SYS_L2C_SIZE(x) _SB_MAKEVALUE(x, S_SYS_L2C_SIZE) argument
99 #define G_SYS_L2C_SIZE(x) _SB_GETVALUE(x, S_SYS_L2C_SIZE, M_SYS_L2C_SIZE) argument
114 #define V_SYS_NUM_CPUS(x) _SB_MAKEVALUE(x, S_SYS_NUM_CPUS) argument
115 #define G_SYS_NUM_CPUS(x) _SB_GETVALUE(x, S_SYS_NUM_CPUS, M_SYS_NUM_CPUS) argument
121 #define V_SYS_PART(x) _SB_MAKEVALUE(x, S_SYS_PART) argument
122 #define G_SYS_PART(x) _SB_GETVALUE(x, S_SYS_PART, M_SYS_PART) argument
135 #define V_SYS_SOC_TYPE(x) _SB_MAKEVALUE(x, S_SYS_SOC_TYPE) argument
136 #define G_SYS_SOC_TYPE(x) _SB_GETVALUE(x, S_SYS_SOC_TYPE, M_SYS_SOC_TYPE) argument
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/arch/arm/include/asm/
Dopcodes.h52 #define __opcode_to_mem_arm(x) swab32(x) argument
53 #define __opcode_to_mem_thumb16(x) swab16(x) argument
54 #define __opcode_to_mem_thumb32(x) swahb32(x) argument
56 #define __opcode_to_mem_arm(x) ((u32)(x)) argument
57 #define __opcode_to_mem_thumb16(x) ((u16)(x)) argument
58 #define __opcode_to_mem_thumb32(x) swahw32(x) argument
61 #define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x) argument
62 #define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x) argument
63 #define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x) argument
68 #define __opcode_is_thumb32(x) ((u32)(x) >= 0xE8000000UL) argument
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Dpgtable-3level-types.h41 #define pte_val(x) ((x).pte) argument
42 #define pmd_val(x) ((x).pmd) argument
43 #define pgd_val(x) ((x).pgd) argument
44 #define pgprot_val(x) ((x).pgprot) argument
46 #define __pte(x) ((pte_t) { (x) } ) argument
47 #define __pmd(x) ((pmd_t) { (x) } ) argument
48 #define __pgd(x) ((pgd_t) { (x) } ) argument
49 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
58 #define pte_val(x) (x) argument
59 #define pmd_val(x) (x) argument
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Dpgtable-2level-types.h38 #define pte_val(x) ((x).pte) argument
39 #define pmd_val(x) ((x).pmd) argument
40 #define pgd_val(x) ((x).pgd[0]) argument
41 #define pgprot_val(x) ((x).pgprot) argument
43 #define __pte(x) ((pte_t) { (x) } ) argument
44 #define __pmd(x) ((pmd_t) { (x) } ) argument
45 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
56 #define pte_val(x) (x) argument
57 #define pmd_val(x) (x) argument
58 #define pgd_val(x) ((x)[0]) argument
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/arch/arm/mach-s3c24xx/include/mach/
Dregs-s3c2412-mem.h17 #define S3C2412_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) argument
18 #define S3C2412_EBIREG(x) (S3C2412_VA_EBI + (x)) argument
20 #define S3C2412_SSMCREG(x) (S3C2412_VA_SSMC + (x)) argument
21 #define S3C2412_SSMC(x, o) (S3C2412_SSMCREG((x * 0x20) + (o))) argument
38 #define S3C2412_SSMC_BANK(x) S3C2412_SSMC(x, 0x00) argument
39 #define S3C2412_SMIDCYR(x) S3C2412_SSMC(x, 0x00) argument
40 #define S3C2412_SMBWSTRD(x) S3C2412_SSMC(x, 0x04) argument
41 #define S3C2412_SMBWSTWRR(x) S3C2412_SSMC(x, 0x08) argument
42 #define S3C2412_SMBWSTOENR(x) S3C2412_SSMC(x, 0x0C) argument
43 #define S3C2412_SMBWSTWENR(x) S3C2412_SSMC(x, 0x10) argument
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Dregs-lcd.h15 #define S3C2410_LCDREG(x) (x) argument
24 #define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8) argument
48 #define S3C2410_LCDCON2_VBPD(x) ((x) << 24) argument
49 #define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14) argument
50 #define S3C2410_LCDCON2_VFPD(x) ((x) << 6) argument
51 #define S3C2410_LCDCON2_VSPW(x) ((x) << 0) argument
53 #define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF) argument
54 #define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF) argument
55 #define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F) argument
57 #define S3C2410_LCDCON3_HBPD(x) ((x) << 19) argument
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/arch/arm/plat-mxc/include/mach/
Diomux-v1.h26 #define MXC_DDIR(x) (0x00 + ((x) << 8)) argument
27 #define MXC_OCR1(x) (0x04 + ((x) << 8)) argument
28 #define MXC_OCR2(x) (0x08 + ((x) << 8)) argument
29 #define MXC_ICONFA1(x) (0x0c + ((x) << 8)) argument
30 #define MXC_ICONFA2(x) (0x10 + ((x) << 8)) argument
31 #define MXC_ICONFB1(x) (0x14 + ((x) << 8)) argument
32 #define MXC_ICONFB2(x) (0x18 + ((x) << 8)) argument
33 #define MXC_DR(x) (0x1c + ((x) << 8)) argument
34 #define MXC_GIUS(x) (0x20 + ((x) << 8)) argument
35 #define MXC_SSR(x) (0x24 + ((x) << 8)) argument
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/arch/mips/include/asm/
Ddebug.h30 #define db_assert(x) if (!(x)) { \ argument
32 #define db_warn(x) if (!(x)) { \ argument
34 #define db_verify(x, y) db_assert(x y) argument
35 #define db_verify_warn(x, y) db_warn(x y) argument
36 #define db_run(x) do { x; } while (0) argument
40 #define db_assert(x) argument
41 #define db_warn(x) argument
42 #define db_verify(x, y) x argument
43 #define db_verify_warn(x, y) x argument
44 #define db_run(x) argument
/arch/mips/include/asm/mach-generic/
Dmangle-port.h30 # define ioswabb(a, x) (x) argument
31 # define __mem_ioswabb(a, x) (x) argument
32 # define ioswabw(a, x) le16_to_cpu(x) argument
33 # define __mem_ioswabw(a, x) (x) argument
34 # define ioswabl(a, x) le32_to_cpu(x) argument
35 # define __mem_ioswabl(a, x) (x) argument
36 # define ioswabq(a, x) le64_to_cpu(x) argument
37 # define __mem_ioswabq(a, x) (x) argument
41 # define ioswabb(a, x) (x) argument
42 # define __mem_ioswabb(a, x) (x) argument
[all …]
/arch/arm/mach-exynos/include/mach/
Dregs-gpio.h19 #define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) argument
20 #define EINT_CON(b, x) (b + 0xE00 + (EINT_REG_NR(x) * 4)) argument
21 #define EINT_FLTCON(b, x) (b + 0xE80 + (EINT_REG_NR(x) * 4)) argument
22 #define EINT_MASK(b, x) (b + 0xF00 + (EINT_REG_NR(x) * 4)) argument
23 #define EINT_PEND(b, x) (b + 0xF40 + (EINT_REG_NR(x) * 4)) argument
25 #define EINT_OFFSET_BIT(x) (1 << (EINT_OFFSET(x) & 0x7)) argument
29 #define S5P_EINT_CON(x) (EXYNOS4_EINT40CON + ((x) * 0x4)) argument
32 #define S5P_EINT_FLTCON(x) (EXYNOS4_EINT40FLTCON0 + ((x) * 0x4)) argument
35 #define S5P_EINT_MASK(x) (EXYNOS4_EINT40MASK + ((x) * 0x4)) argument
38 #define S5P_EINT_PEND(x) (EXYNOS4_EINT40PEND + ((x) * 0x4)) argument
/arch/arm/mach-nomadik/include/mach/
Dfsmc.h13 #define FSMC_BCR(x) (NOMADIK_FSMC_VA + (x << 3)) argument
14 #define FSMC_BTR(x) (NOMADIK_FSMC_VA + (x << 3) + 0x04) argument
23 #define FSMC_PCR(x) (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x00) argument
24 #define FSMC_PMEM(x) (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x08) argument
25 #define FSMC_PATT(x) (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x0c) argument
26 #define FSMC_PIO(x) (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x10) argument
27 #define FSMC_PECCR(x) (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x14) argument
/arch/avr32/mach-at32ap/include/mach/
Dio.h10 # define ioswabb(a, x) (x) argument
11 # define ioswabw(a, x) (x) argument
12 # define ioswabl(a, x) (x) argument
13 # define __mem_ioswabb(a, x) (x) argument
14 # define __mem_ioswabw(a, x) swab16(x) argument
15 # define __mem_ioswabl(a, x) swab32(x) argument
20 # define ioswabb(a, x) (x) argument
21 # define ioswabw(a, x) (x) argument
22 # define ioswabl(a, x) swahw32(x) argument
23 # define __mem_ioswabb(a, x) (x) argument
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/arch/arm/mach-s5pv210/include/mach/
Dregs-gpio.h19 #define S5P_EINT_CON(x) (S5PV210_EINT30CON + ((x) * 0x4)) argument
22 #define S5P_EINT_FLTCON(x) (S5PV210_EINT30FLTCON0 + ((x) * 0x4)) argument
25 #define S5P_EINT_MASK(x) (S5PV210_EINT30MASK + ((x) * 0x4)) argument
28 #define S5P_EINT_PEND(x) (S5PV210_EINT30PEND + ((x) * 0x4)) argument
30 #define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) argument
36 #define EINT_GPIO_0(x) S5PV210_GPH0(x) argument
37 #define EINT_GPIO_1(x) S5PV210_GPH1(x) argument
38 #define EINT_GPIO_2(x) S5PV210_GPH2(x) argument
39 #define EINT_GPIO_3(x) S5PV210_GPH3(x) argument
/arch/arm/mach-s5pc100/include/mach/
Dregs-gpio.h15 #define S5P_EINT_CON(x) (S5PC100EINT30CON + ((x) * 0x4)) argument
18 #define S5P_EINT_FLTCON(x) (S5PC100EINT30FLTCON0 + ((x) * 0x4)) argument
21 #define S5P_EINT_MASK(x) (S5PC100EINT30MASK + ((x) * 0x4)) argument
24 #define S5P_EINT_PEND(x) (S5PC100EINT30PEND + ((x) * 0x4)) argument
26 #define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) argument
32 #define EINT_GPIO_0(x) S5PC100_GPH0(x) argument
33 #define EINT_GPIO_1(x) S5PC100_GPH1(x) argument
34 #define EINT_GPIO_2(x) S5PC100_GPH2(x) argument
35 #define EINT_GPIO_3(x) S5PC100_GPH3(x) argument
/arch/mips/include/asm/sn/
Dmapped_kernel.h31 #define MAPPED_ADDR_RO_TO_PHYS(x) (x - REP_BASE) argument
32 #define MAPPED_ADDR_RW_TO_PHYS(x) (x - REP_BASE - 16777216) argument
37 #define MAPPED_KERN_RO_TO_PHYS(x) \ argument
40 #define MAPPED_KERN_RW_TO_PHYS(x) \ argument
46 #define MAPPED_KERN_RO_TO_PHYS(x) (x - REP_BASE) argument
47 #define MAPPED_KERN_RW_TO_PHYS(x) (x - REP_BASE) argument
51 #define MAPPED_KERN_RO_TO_K0(x) PHYS_TO_K0(MAPPED_KERN_RO_TO_PHYS(x)) argument
52 #define MAPPED_KERN_RW_TO_K0(x) PHYS_TO_K0(MAPPED_KERN_RW_TO_PHYS(x)) argument
/arch/sparc/include/asm/
Dpage_64.h67 #define pte_val(x) ((x).pte) argument
68 #define iopte_val(x) ((x).iopte) argument
69 #define pmd_val(x) ((x).pmd) argument
70 #define pgd_val(x) ((x).pgd) argument
71 #define pgprot_val(x) ((x).pgprot) argument
73 #define __pte(x) ((pte_t) { (x) } ) argument
74 #define __iopte(x) ((iopte_t) { (x) } ) argument
75 #define __pmd(x) ((pmd_t) { (x) } ) argument
76 #define __pgd(x) ((pgd_t) { (x) } ) argument
77 #define __pgprot(x) ((pgprot_t) { (x) } ) argument
[all …]
/arch/arm/mach-pxa/
Dcm-x2xx-pci.h6 #define cmx2xx_pci_init_irq(x) __cmx2xx_pci_init_irq(x) argument
7 #define cmx2xx_pci_suspend(x) __cmx2xx_pci_suspend(x) argument
8 #define cmx2xx_pci_resume(x) __cmx2xx_pci_resume(x) argument
10 #define cmx2xx_pci_init_irq(x) do {} while (0) argument
11 #define cmx2xx_pci_suspend(x) do {} while (0) argument
12 #define cmx2xx_pci_resume(x) do {} while (0) argument

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