Searched refs:AT91_CKGR_PLLAR (Results 1 – 3 of 3) sorted by relevance
| /arch/arm/mach-at91/ |
| D | pm_slowclock.S | 203 ldr tmp1, [pmc, #AT91_CKGR_PLLAR]
208 str tmp1, [pmc, #AT91_CKGR_PLLAR]
246 str tmp1, [pmc, #AT91_CKGR_PLLAR]
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| D | clock.c | 445 seq_printf(s, "PLLA = %8x\n", at91_pmc_read(AT91_CKGR_PLLAR)); in at91_clk_show()
697 plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_pmc_read(AT91_CKGR_PLLAR)); in at91_pmc_init()
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| /arch/arm/mach-at91/include/mach/ |
| D | at91_pmc.h | 72 #define AT91_CKGR_PLLAR 0x28 /* PLL A Register */ macro
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