Searched refs:AT91_TC_CLK1BASE (Results 1 – 1 of 1) sorted by relevance
41 #define AT91_TC_CLK1BASE 0x40 macro46 return (at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_CV) * 1000000 / (AT91X40_MASTER_CLOCK / 128)); in at91x40_gettimeoffset()51 at91_tc_read(AT91_TC_CLK1BASE + AT91_TC_SR); in at91x40_timer_interrupt()71 at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, AT91_TC_CLKDIS); in at91x40_timer_init()72 at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CMR, (AT91_TC_TIMER_CLOCK4 | AT91_TC_CPCTRG)); in at91x40_timer_init()73 at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IDR, 0xffffffff); in at91x40_timer_init()74 at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_RC, (AT91X40_MASTER_CLOCK / 128) / HZ - 1); in at91x40_timer_init()75 at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_IER, (1<<4)); in at91x40_timer_init()79 at91_tc_write(AT91_TC_CLK1BASE + AT91_TC_CCR, (AT91_TC_SWTRG | AT91_TC_CLKEN)); in at91x40_timer_init()