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Searched refs:CACHE_OC_ADDRESS_ARRAY (Results 1 – 13 of 13) sorted by relevance

/arch/sh/mm/
Dcache-sh2a.c32 data = __raw_readl(CACHE_OC_ADDRESS_ARRAY | addr); in sh2a_flush_oc_line()
35 __raw_writel(data, CACHE_OC_ADDRESS_ARRAY | addr); in sh2a_flush_oc_line()
68 begin = CACHE_OC_ADDRESS_ARRAY; in sh2a__flush_wback_region()
112 sh2a_invalidate_line(CACHE_OC_ADDRESS_ARRAY, v); in sh2a__flush_purge_region()
140 sh2a_invalidate_line(CACHE_OC_ADDRESS_ARRAY, v); in sh2a__flush_invalidate_region()
Dcache-sh2.c28 unsigned long addr = CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0); in sh2__flush_wback_region()
51 CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); in sh2__flush_purge_region()
82 CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); in sh2__flush_invalidate_region()
Dcache-sh3.c46 unsigned long addrstart = CACHE_OC_ADDRESS_ARRAY; in sh3__flush_wback_region()
87 addr = CACHE_OC_ADDRESS_ARRAY | in sh3__flush_purge_region()
Dcache-sh4.c98 (start < CACHE_OC_ADDRESS_ARRAY)) in flush_cache_one()
121 flush_cache_one(CACHE_OC_ADDRESS_ARRAY | in sh4_flush_dcache_page()
153 end_addr = CACHE_OC_ADDRESS_ARRAY + in flush_dcache_all()
160 for (addr = CACHE_OC_ADDRESS_ARRAY; addr < end_addr; ) { in flush_dcache_all()
253 flush_cache_one(CACHE_OC_ADDRESS_ARRAY | in sh4_flush_cache_page()
Dcache-sh7705.c40 addrstart = CACHE_OC_ADDRESS_ARRAY; in cache_wback_all()
108 addrstart = CACHE_OC_ADDRESS_ARRAY; in __flush_dcache_page()
Dcache-debugfs.c48 addrstart = CACHE_OC_ADDRESS_ARRAY; in cache_seq_show()
/arch/sh/include/cpu-sh2/cpu/
Dcache.h34 #define CACHE_OC_ADDRESS_ARRAY 0xf0000000 macro
/arch/sh/include/cpu-sh3/cpu/
Dcache.h28 #define CACHE_OC_ADDRESS_ARRAY 0xf0000000 macro
/arch/sh/include/cpu-sh2a/cpu/
Dcache.h35 #define CACHE_OC_ADDRESS_ARRAY 0xf0800000 macro
/arch/sh/include/cpu-sh4/cpu/
Dcache.h39 #define CACHE_OC_ADDRESS_ARRAY 0xf4000000 macro
/arch/sh/kernel/cpu/sh3/
Dprobe.c29 addr0 = CACHE_OC_ADDRESS_ARRAY + (3 << 12); in cpu_probe()
30 addr1 = CACHE_OC_ADDRESS_ARRAY + (1 << 12); in cpu_probe()
/arch/sh/include/cpu-sh5/cpu/
Dcache.h80 #define CACHE_OC_ADDRESS_ARRAY 0x01800000 macro
/arch/sh/kernel/cpu/
Dinit.c152 addrstart = CACHE_OC_ADDRESS_ARRAY; in cache_init()