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Searched refs:CM_FCLKEN (Results 1 – 7 of 7) sorted by relevance

/arch/arm/mach-omap2/
Dcm2xxx_3xxx.c344 omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_FCLKEN); in omap3_cm_save_context()
352 omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_FCLKEN); in omap3_cm_save_context()
354 omap2_cm_read_mod_reg(WKUP_MOD, CM_FCLKEN); in omap3_cm_save_context()
356 omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, CM_FCLKEN); in omap3_cm_save_context()
358 omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, CM_FCLKEN); in omap3_cm_save_context()
360 omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN); in omap3_cm_save_context()
362 omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN); in omap3_cm_save_context()
473 CM_FCLKEN); in omap3_cm_restore_context()
481 CM_FCLKEN); in omap3_cm_restore_context()
482 omap2_cm_write_mod_reg(cm_context.wkup_cm_fclken, WKUP_MOD, CM_FCLKEN); in omap3_cm_restore_context()
[all …]
Dcm2xxx_3xxx.h50 #define CM_FCLKEN 0x0000 macro
51 #define CM_FCLKEN1 CM_FCLKEN
52 #define CM_CLKEN CM_FCLKEN
Dclock3xxx_data.c1136 .enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN),
1241 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
1251 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
1295 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_FCLKEN),
2156 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
2166 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
2176 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
2186 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
2196 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
2230 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
[all …]
Dpm34xx.c472 omap2_cm_write_mod_reg(0, OMAP3430_IVA2_MOD, CM_FCLKEN); in omap3_iva_idle()
487 OMAP3430_IVA2_MOD, CM_FCLKEN); in omap3_iva_idle()
497 omap2_cm_write_mod_reg(0, OMAP3430_IVA2_MOD, CM_FCLKEN); in omap3_iva_idle()
Dclock2420_data.c449 .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
485 .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
499 .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
681 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
696 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
855 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
1309 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
1329 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
Dclock2430_data.c427 .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
446 .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
625 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
640 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
697 .enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_FCLKEN),
842 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
1388 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
1408 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
Dclock.c153 r = ((__force u32)clk->enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN)); in omap2_clk_dflt_find_companion()