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Searched refs:CPU_REG (Results 1 – 5 of 5) sorted by relevance

/arch/arm/mach-h720x/
Dcommon.c50 return (CPU_REG (TIMER_VIRT, TM0_COUNT) * tick_usec) / LATCH; in h720x_gettimeoffset()
58 CPU_REG (IRQC_VIRT, IRQC_IER) &= ~(1 << d->irq); in mask_global_irq()
66 CPU_REG (IRQC_VIRT, IRQC_IER) |= (1 << d->irq); in unmask_global_irq()
78 if ( (CPU_REG (reg_base, GPIO_EDGE) & bit)) in ack_gpio_irq()
79 CPU_REG (reg_base, GPIO_CLR) = bit; in ack_gpio_irq()
89 CPU_REG (reg_base, GPIO_MASK) &= ~bit; in mask_gpio_irq()
99 CPU_REG (reg_base, GPIO_MASK) |= bit; in unmask_gpio_irq()
122 mask = CPU_REG(GPIO_A_VIRT,GPIO_STAT); in h720x_gpioa_demux_handler()
132 mask = CPU_REG(GPIO_B_VIRT,GPIO_STAT); in h720x_gpiob_demux_handler()
143 mask = CPU_REG(GPIO_C_VIRT,GPIO_STAT); in h720x_gpioc_demux_handler()
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Dcpu-h7202.c113 mask = CPU_REG (TIMER_VIRT, TIMER_TOPSTAT); in h7202_timerx_demux_handler()
148 CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit; in __mask_timerx_irq()
163 CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) |= bit; in unmask_timerx_irq()
183 CPU_REG (TIMER_VIRT, TM0_PERIOD) = LATCH; in h7202_init_time()
184 CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_RESET; in h7202_init_time()
185 CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_REPEAT | TM_START; in h7202_init_time()
186 CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) = ENABLE_TM0_INTR | TIMER_ENABLE_BIT; in h7202_init_time()
200 CPU_REG (GPIO_E_VIRT, GPIO_MASK) = 0x0; in h7202_init_irq()
217 CPU_REG (PMU_BASE, PMU_PLL_CTRL) |= PLL_2_EN | PLL_1_EN | PLL_3_MUTE; in init_hw_h7202()
219 CPU_REG (SERIAL0_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN; in init_hw_h7202()
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Dcpu-h7201.c32 CPU_REG (TIMER_VIRT, TIMER_TOPSTAT); in h7201_timer_interrupt()
49 CPU_REG (TIMER_VIRT, TM0_PERIOD) = LATCH; in h7201_init_time()
50 CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_RESET; in h7201_init_time()
51 CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_REPEAT | TM_START; in h7201_init_time()
52 CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) = ENABLE_TM0_INTR | TIMER_ENABLE_BIT; in h7201_init_time()
Dh7202-eval.c68 CPU_REG (GPIO_B_VIRT, GPIO_POL) &= ~(1 << 8); in init_eval_h7202()
69 CPU_REG (GPIO_B_VIRT, GPIO_EN) |= (1 << 8); in init_eval_h7202()
/arch/arm/mach-h720x/include/mach/
Dhardware.h42 #define CPU_REG(x,y) CPU_IO(x+y) macro
45 #define IRQ_REG(x) CPU_REG(IRQC_VIRT,x)