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Searched refs:CSYNC (Results 1 – 19 of 19) sorted by relevance

/arch/blackfin/include/asm/
Dblackfin.h35 static inline void CSYNC(void) in CSYNC() function
62 #define csync(x) CSYNC(x)
73 #define CSYNC(scratch) \ macro
77 CSYNC; \
83 #define CSYNC(scratch) CSYNC; macro
Dentry.h135 CSYNC; \
164 CSYNC; \
Dcplb.h118 CSYNC(); in disable_cplb()
138 CSYNC(); in enable_cplb()
Dipipe.h165 CSYNC(); \
/arch/blackfin/kernel/
Dtime-ts.c228 CSYNC(); in bfin_coretmr_set_next_event()
230 CSYNC(); in bfin_coretmr_set_next_event()
242 CSYNC(); in bfin_coretmr_set_mode()
246 CSYNC(); in bfin_coretmr_set_mode()
252 CSYNC(); in bfin_coretmr_set_mode()
260 CSYNC(); in bfin_coretmr_set_mode()
271 CSYNC(); in bfin_coretmr_init()
278 CSYNC(); in bfin_coretmr_init()
Dtime.c54 CSYNC(); in setup_core_timer()
64 CSYNC(); in setup_core_timer()
Dirqchip.c100 CSYNC(); in maybe_lower_to_irq14()
Dearly_printk.c192 CSYNC(); in init_early_exception_vectors()
Dkgdb.c316 CSYNC(); in bfin_correct_hw_break()
319 CSYNC(); in bfin_correct_hw_break()
328 CSYNC(); in bfin_disable_hw_debug()
Dtraps.c58 CSYNC(); in trap_init()
60 CSYNC(); in trap_init()
Ddebug-mmrs.c105 DEFINE_SYSREG(syscfg, , CSYNC());
/arch/blackfin/mach-bf561/
Dcoreb.c46 CSYNC(); in coreb_ioctl()
Datomic.S53 CSYNC(r2);
81 CSYNC(r2);
697 CSYNC(r2);
921 CSYNC(r2);
Dsecondary.S62 CSYNC;
/arch/blackfin/mach-common/
Dsmp.c378 CSYNC(); in setup_secondary()
380 CSYNC(); in setup_secondary()
382 CSYNC(); in setup_secondary()
Dpm.c106 CSYNC(); in flushinv_all_dcache()
Dints-priority.c941 CSYNC(); in init_exception_vectors()
1065 CSYNC(); in init_arch_irq()
1067 CSYNC(); in init_arch_irq()
1069 CSYNC(); in init_arch_irq()
Dhead.S71 CSYNC;
Dentry.S379 CSYNC; /* Disabling of CPLBs should be proceeded by a CSYNC */
387 CSYNC; /* Disabling of CPLBs should be proceeded by a CSYNC */
1262 CSYNC; /* Disabling of CPLBs should be proceeded by a CSYNC */
1270 CSYNC; /* Disabling of CPLBs should be proceeded by a CSYNC */