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Searched refs:CVMX_IPD_OPC_MODE_STT (Results 1 – 2 of 2) sorted by relevance

/arch/mips/include/asm/octeon/
Dcvmx-ipd.h41 CVMX_IPD_OPC_MODE_STT = 0LL, /* All blocks DRAM, not cached in L2 */ enumerator
/arch/mips/cavium-octeon/executive/
Dcvmx-helper.c417 CVMX_IPD_OPC_MODE_STT, in __cvmx_helper_global_setup_ipd()