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Searched refs:DCPLB_ADDR5 (Results 1 – 4 of 4) sorted by relevance

/arch/blackfin/include/asm/
Dcdef_LPBlackfin.h38 #define bfin_read_DCPLB_ADDR5() bfin_read32(DCPLB_ADDR5)
39 #define bfin_write_DCPLB_ADDR5(val) bfin_write32(DCPLB_ADDR5,val)
Ddef_LPBlackfin.h261 #define DCPLB_ADDR5 0xFFE00114 /* Data Cacheability Protection macro
/arch/blackfin/mach-common/
Ddpmc_modes.S488 PM_PUSH(5, DCPLB_ADDR5)
752 PM_POP(5, DCPLB_ADDR5)
/arch/blackfin/kernel/
Ddebug-mmrs.c644 D32(DCPLB_ADDR5); in bfin_debug_mmrs_init()