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Searched refs:DDRClock (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-bcmring/csp/chipc/
DchipcHw.c100 pPLLReg = &pChipcHw->DDRClock; in chipcHw_getClockFrequency()
310 …pChipcHw->DDRClock = (pChipcHw->DDRClock & ~chipcHw_REG_PLL_CLOCK_TO_BUS_RATIO_MASK) | ((((freq / … in chipcHw_setClockFrequency()
314 pPLLReg = &pChipcHw->DDRClock; in chipcHw_setClockFrequency()
429 if (pPLLReg == &pChipcHw->DDRClock) { in chipcHw_setClockFrequency()
/arch/arm/mach-bcmring/include/mach/csp/
DchipcHw_reg.h34 uint32_t DDRClock; /* PLL1 Channel 1 for DDR clock */ member
DchipcHw_inline.h849 pPLLReg = &pChipcHw->DDRClock; in chipcHw_setClock()