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Searched refs:DIV4_HP (Results 1 – 5 of 5) sorted by relevance

/arch/arm/mach-shmobile/
Dclock-sh7372.c345 DIV4_ZTR, DIV4_ZT, DIV4_ZX, DIV4_HP, enumerator
361 [DIV4_HP] = DIV4(FRQCRB, 4, 0x6fff, 0),
540 [MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC1 */
541 [MSTP217] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* DMAC2 */
542 [MSTP216] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 16, 0), /* DMAC3 */
543 [MSTP214] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 14, 0), /* USBDMAC */
556 [MSTP315] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 15, 0), /* FLCTL*/
557 [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
558 [MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */
559 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMC */
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Dclock-sh7367.c176 DIV4_ZX, DIV4_ZT, DIV4_Z, DIV4_ZD, DIV4_HP, enumerator
191 [DIV4_HP] = DIV4(SYFRQCR, 4, 0x6fff, 0),
255 [SYMSTP215] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 15, 0), /* FLCTL */
256 [SYMSTP214] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 14, 0), /* SDHI0 */
257 [SYMSTP213] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 13, 0), /* SDHI1 */
258 [SYMSTP211] = MSTP(&div4_clks[DIV4_HP], SYMSTPCR2, 11, 0), /* SDHI2 */
281 CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]),
Dclock-sh73a0.c261 DIV4_Z, DIV4_ZTR, DIV4_ZT, DIV4_ZX, DIV4_HP, DIV4_NR }; enumerator
277 [DIV4_HP] = DIV4(FRQCRB, 4, 0xfff, 0),
490 [MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */
497 [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
510 [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
511 [MSTP318] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* SY-DMAC */
514 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
520 [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
521 [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */
Dclock-sh7377.c186 DIV4_ZTR, DIV4_ZT, DIV4_Z, DIV4_HP, enumerator
201 [DIV4_HP] = DIV4(SYFRQCR, 4, 0x6fff, 0),
264 [MSTP315] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 15, 0), /* FLCTL */
265 [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
266 [MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */
291 CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]),
Dclock-r8a7740.c225 DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP, enumerator
235 [DIV4_HP] = SH_CLK_DIV4(&pllc1_clk, FRQCRB, 4, 0x6fff, 0),
308 CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]),