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Searched refs:DIV4_S (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-shmobile/
Dclock-r8a7779.c72 enum { DIV4_S, DIV4_OUT, DIV4_S4, DIV4_S3, DIV4_S1, DIV4_P, DIV4_NR }; enumerator
75 [DIV4_S] = SH_CLK_DIV4(&plla_clk, FRQMR, 20,
116 .parent = &div4_clks[DIV4_S],
121 .parent = &div4_clks[DIV4_S],
136 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_S]),
Dclock-r8a7740.c226 DIV4_HPP, DIV4_S, DIV4_ZB, DIV4_M3, DIV4_CP, enumerator
237 [DIV4_S] = SH_CLK_DIV4(&pllc1_clk, FRQCRC, 12, 0x6fff, 0),
310 CLKDEV_CON_ID("s_clk", &div4_clks[DIV4_S]),
Dclock-sh7367.c175 enum { DIV4_I, DIV4_G, DIV4_S, DIV4_B, enumerator
185 [DIV4_S] = DIV4(RTFRQCR, 12, 0x6fff, CLK_ENABLE_ON_INIT),
Dclock-sh7372.c346 DIV4_ISPB, DIV4_S, DIV4_ZB, DIV4_ZB3, DIV4_CP, enumerator
363 [DIV4_S] = DIV4(FRQCRC, 12, 0x6fff, 0),
598 CLKDEV_CON_ID("s_clk", &div4_clks[DIV4_S]),