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Searched refs:DMAEN (Results 1 – 3 of 3) sorted by relevance

/arch/blackfin/kernel/
Dbfin_dma.c212 if (dma_ch[i].regs->cfg & DMAEN) { in blackfin_dma_suspend()
309 bfin_write16(&src_ch->cfg, DMAEN | WDSIZE_32); in early_dma_memcpy()
310 bfin_write16(&dst_ch->cfg, WNR | DI_EN | DMAEN | WDSIZE_32); in early_dma_memcpy()
393 bfin_write_MDMA_S0_CONFIG(DMAEN | conf); in __dma_memcpy()
394 bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | conf); in __dma_memcpy()
/arch/blackfin/include/asm/
Dbfin_dma.h15 #define DMAEN 0x0001 /* DMA Channel Enable */ macro
Ddma.h217 dma_ch[channel].regs->cfg &= ~DMAEN; in disable_dma()
224 dma_ch[channel].regs->cfg |= DMAEN; in enable_dma()