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Searched refs:DSCR_CMD0_SN (Results 1 – 2 of 2) sorted by relevance

/arch/mips/include/asm/mach-au1x00/
Dau1xxx_dbdma.h118 #define DSCR_CMD0_SN (0x1 << 12) /* Source non-coherent */ macro
/arch/mips/alchemy/common/
Ddbdma.c491 cmd0 |= DSCR_CMD0_SN; /* Source in FIFO */ in au1xxx_dbdma_ring_alloc()