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Searched refs:EP93XX_I2SCLKDIV_LRDIV64 (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-ep93xx/
Dsoc.h178 #define EP93XX_I2SCLKDIV_LRDIV64 (1 << 17) macro
Dclock.c457 ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_LRDIV64, in set_i2s_lrclk_rate()