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Searched refs:EP93XX_I2SCLKDIV_SDIV (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-ep93xx/
Dsoc.h176 #define EP93XX_I2SCLKDIV_SDIV (1 << 16) macro
Dclock.c436 ep93xx_syscon_swlocked_write(val & ~EP93XX_I2SCLKDIV_SDIV, in set_i2s_sclk_rate()
439 ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_SDIV, in set_i2s_sclk_rate()