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Searched refs:FPU_CSR_RM (Results 1 – 2 of 2) sorted by relevance

/arch/mips/math-emu/
Dcp1emu.c82 #define modeindex(v) ((v) & FPU_CSR_RM)
396 value = (value & ~FPU_CSR_RM) | in cop1Emulate()
436 ~(FPU_CSR_RSVD | FPU_CSR_RM)) | in cop1Emulate()
/arch/mips/include/asm/
Dmipsregs.h171 #define FPU_CSR_RM 0x00000003 macro