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Searched refs:GFX_MOD (Results 1 – 6 of 6) sorted by relevance

/arch/arm/mach-omap2/
Dpowerdomains2xxx_3xxx_data.c47 .prcm_offs = GFX_MOD,
Dprcm-common.h28 #define GFX_MOD 0x300 macro
41 #define OMAP3430ES2_SGX_MOD GFX_MOD
Dclkt2xxx_virt_prcm_set.c143 omap2_cm_write_mod_reg(prcm->cm_clksel_gfx, GFX_MOD, CM_CLKSEL); in omap2_select_table_rate()
Dclock2420_data.c681 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
683 .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL),
696 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
698 .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL),
710 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
Dclock2430_data.c625 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
627 .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL),
640 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
642 .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL),
654 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
Dclock3xxx_data.c1212 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
1222 .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL),
1241 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
1251 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),