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Searched refs:INTC_BASE (Results 1 – 4 of 4) sorted by relevance

/arch/sh/boards/mach-sh7763rdp/
Dirq.c20 #define INTC_BASE (0xFFD00000) macro
21 #define INTC_INT2PRI7 (INTC_BASE+0x4001C)
22 #define INTC_INT2MSKCR (INTC_BASE+0x4003C)
23 #define INTC_INT2MSKCR1 (INTC_BASE+0x400D4)
/arch/microblaze/kernel/
Dintc.c23 #define INTC_BASE BARRIER_BASE_ADDR macro
26 #define INTC_BASE intc_baseaddr macro
47 out_be32(INTC_BASE + SIE, mask); in intc_enable_or_unmask()
54 out_be32(INTC_BASE + IAR, mask); in intc_enable_or_unmask()
60 out_be32(INTC_BASE + CIE, 1 << d->hwirq); in intc_disable_or_mask()
66 out_be32(INTC_BASE + IAR, 1 << d->hwirq); in intc_ack()
74 out_be32(INTC_BASE + CIE, mask); in intc_mask_ack()
75 out_be32(INTC_BASE + IAR, mask); in intc_mask_ack()
92 hwirq = in_be32(INTC_BASE + IVR); in get_irq()
/arch/sh/boards/mach-se/7780/
Dirq.c18 #define INTC_BASE 0xffd00000 macro
19 #define INTC_ICR1 (INTC_BASE+0x1c)
/arch/sh/kernel/cpu/irq/
Dintc-sh5.c35 #define INTC_BASE PHYS_PERIPHERAL_BLOCK + \ macro
130 intc_virt = (unsigned long)ioremap_nocache(INTC_BASE, 1024); in plat_irq_setup()