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Searched refs:IOMMU_PAGE_SHIFT (Results 1 – 12 of 12) sorted by relevance

/arch/powerpc/include/asm/
Diommu.h33 #define IOMMU_PAGE_SHIFT 12 macro
34 #define IOMMU_PAGE_SIZE (ASM_CONST(1) << IOMMU_PAGE_SHIFT)
35 #define IOMMU_PAGE_MASK (~((1 << IOMMU_PAGE_SHIFT) - 1))
45 return __ilog2((size - 1) >> IOMMU_PAGE_SHIFT) + 1; in get_iommu_order()
/arch/powerpc/kernel/
Diommu.c120 1 << IOMMU_PAGE_SHIFT); in iommu_range_alloc()
122 boundary_size = ALIGN(1UL << 32, 1 << IOMMU_PAGE_SHIFT); in iommu_range_alloc()
126 tbl->it_offset, boundary_size >> IOMMU_PAGE_SHIFT, in iommu_range_alloc()
182 ret = entry << IOMMU_PAGE_SHIFT; /* Set the return dma address */ in iommu_alloc()
218 entry = dma_addr >> IOMMU_PAGE_SHIFT; in __iommu_free()
304 if (IOMMU_PAGE_SHIFT < PAGE_SHIFT && slen >= PAGE_SIZE && in iommu_map_sg()
306 align = PAGE_SHIFT - IOMMU_PAGE_SHIFT; in iommu_map_sg()
308 mask >> IOMMU_PAGE_SHIFT, align); in iommu_map_sg()
323 dma_addr = entry << IOMMU_PAGE_SHIFT; in iommu_map_sg()
588 if (IOMMU_PAGE_SHIFT < PAGE_SHIFT && size >= PAGE_SIZE && in iommu_map_page()
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Ddma-iommu.c86 if ((tbl->it_offset + tbl->it_size) > (mask >> IOMMU_PAGE_SHIFT)) { in dma_iommu_dma_supported()
90 IOMMU_PAGE_SHIFT); in dma_iommu_dma_supported()
Dvio.c1072 tbl->it_size = size >> IOMMU_PAGE_SHIFT; in vio_build_iommu_table()
1074 tbl->it_offset = offset >> IOMMU_PAGE_SHIFT; in vio_build_iommu_table()
/arch/sparc/kernel/
Diommu_common.h34 #define IOMMU_PAGE_SHIFT 13 macro
Dpsycho_common.c187 (tag_val & PSYCHO_IOMMU_TAG_VPAGE) << IOMMU_PAGE_SHIFT); in psycho_dump_iommu_tags_and_data()
193 (data_val & PSYCHO_IOMMU_DATA_PPAGE) << IOMMU_PAGE_SHIFT); in psycho_dump_iommu_tags_and_data()
Dpci_schizo.c331 (tag & SCHIZO_IOMMU_TAG_VPAGE) << IOMMU_PAGE_SHIFT); in schizo_check_iommu_error_pbm()
336 (data & SCHIZO_IOMMU_DATA_PPAGE) << IOMMU_PAGE_SHIFT); in schizo_check_iommu_error_pbm()
/arch/powerpc/platforms/cell/
Diommu.c433 IOMMU_PAGE_SHIFT); in cell_iommu_setup_hardware()
490 window->table.it_offset = (offset >> IOMMU_PAGE_SHIFT) + pte_offset; in cell_iommu_setup_window()
491 window->table.it_size = size >> IOMMU_PAGE_SHIFT; in cell_iommu_setup_window()
778 offset >> IOMMU_PAGE_SHIFT); in cell_iommu_init_one()
1127 IOMMU_PAGE_SHIFT); in cell_iommu_fixed_mapping_init()
/arch/powerpc/platforms/pseries/
Dsetup.c73 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT);
452 int page_order = IOMMU_PAGE_SHIFT; in pSeries_cmo_feature_init()
Diommu.c484 tbl->it_offset = phb->dma_window_base_cur >> IOMMU_PAGE_SHIFT; in iommu_table_setparms()
495 tbl->it_size = phb->dma_window_size >> IOMMU_PAGE_SHIFT; in iommu_table_setparms()
536 tbl->it_offset = offset >> IOMMU_PAGE_SHIFT; in iommu_table_setparms_lpar()
537 tbl->it_size = size >> IOMMU_PAGE_SHIFT; in iommu_table_setparms_lpar()
/arch/powerpc/platforms/wsp/
Dwsp_pci.c263 tcep, *tcep, (tbl->it_offset + index) << IOMMU_PAGE_SHIFT); in tce_build_wsp()
384 tbl->table.it_offset = addr >> IOMMU_PAGE_SHIFT; in wsp_pci_create_dma32_table()
385 tbl->table.it_size = size >> IOMMU_PAGE_SHIFT; in wsp_pci_create_dma32_table()
452 table->table.it_offset << IOMMU_PAGE_SHIFT, in wsp_pci_dma_dev_setup()
453 (table->table.it_offset << IOMMU_PAGE_SHIFT) in wsp_pci_dma_dev_setup()
/arch/powerpc/platforms/powernv/
Dpci.c456 tbl->it_offset = dma_offset >> IOMMU_PAGE_SHIFT; in pnv_pci_setup_iommu_table()