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Searched refs:IRQ_EINT0 (Results 1 – 13 of 13) sorted by relevance

/arch/arm/mach-s3c24xx/
Dirq-s3c2412.c54 unsigned long bitval = 1UL << (data->irq - IRQ_EINT0); in s3c2412_irq_mask()
67 unsigned long bitval = 1UL << (data->irq - IRQ_EINT0); in s3c2412_irq_ack()
77 unsigned long bitval = 1UL << (data->irq - IRQ_EINT0); in s3c2412_irq_maskack()
94 unsigned long bitval = 1UL << (data->irq - IRQ_EINT0); in s3c2412_irq_unmask()
132 #define INTMSK_CFSDI (1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0))
177 for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) { in s3c2412_irq_add()
Dirq-s3c2443.c75 #define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0))
106 #define INTMSK_LCD (1UL << (IRQ_LCD - IRQ_EINT0))
137 #define INTMSK_DMA (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
168 #define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
199 #define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
Dirq-s3c2416.c77 #define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0))
108 #define INTMSK_LCD (1UL << (IRQ_LCD - IRQ_EINT0))
139 #define INTMSK_DMA (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
171 #define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
Dirq-s3c2440.c69 #define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0))
Dirq-s3c244x.c68 #define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
Dmach-anubis.c337 .start = IRQ_EINT0,
338 .end = IRQ_EINT0,
/arch/arm/plat-s3c24xx/
Dirq.c40 unsigned int irqno = data->irq - IRQ_EINT0; in s3c_irq_mask()
51 unsigned long bitval = 1UL << (data->irq - IRQ_EINT0); in s3c_irq_ack()
60 unsigned long bitval = 1UL << (data->irq - IRQ_EINT0); in s3c_irq_maskack()
80 irqno -= IRQ_EINT0; in s3c_irq_unmask()
160 if ((data->irq >= IRQ_EINT0) && (data->irq <= IRQ_EINT3)) { in s3c_irqext_type()
163 gpcon_offset = (data->irq - IRQ_EINT0) * 2; in s3c_irqext_type()
164 extint_offset = (data->irq - IRQ_EINT0) * 4; in s3c_irqext_type()
248 #define INTMSK_UART0 (1UL << (IRQ_UART0 - IRQ_EINT0))
249 #define INTMSK_UART1 (1UL << (IRQ_UART1 - IRQ_EINT0))
250 #define INTMSK_UART2 (1UL << (IRQ_UART2 - IRQ_EINT0))
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Dirq-pm.c32 unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL;
37 unsigned long irqbit = 1 << (data->irq - IRQ_EINT0); in s3c_irq_wake()
/arch/arm/mach-s3c24xx/include/mach/
Dtick.h10 #define SRCPND_TIMER4 (1<<(IRQ_TIMER4 - IRQ_EINT0))
Dirqs.h26 #define IRQ_EINT0 S3C2410_IRQ(0) /* 16 */ macro
84 #define IRQ_EINT(x) (((x) >= 4) ? (IRQ_EINT4 + (x) - 4) : (IRQ_EINT0 + (x)))
200 #define FIQ_START IRQ_EINT0
Dpm-core.h54 s3c_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND), in s3c_pm_arch_show_resume_irqs()
Dgta02.h61 #define GTA02_IRQ_GSENSOR_1 IRQ_EINT0
Dentry-macro.S66 adds \irqnr, \irqnr, #IRQ_EINT0