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Searched refs:IRQ_MEM_DMA0 (Results 1 – 13 of 13) sorted by relevance

/arch/blackfin/mach-bf537/
DKconfig98 config IRQ_MEM_DMA0 config
99 int "IRQ_MEM_DMA0"
Ddma.c89 ret_irq = IRQ_MEM_DMA0; in channel2irq()
/arch/blackfin/mach-bf533/
Ddma.c69 ret_irq = IRQ_MEM_DMA0; in channel2irq()
/arch/blackfin/mach-bf527/
Ddma.c89 ret_irq = IRQ_MEM_DMA0; in channel2irq()
DKconfig272 config IRQ_MEM_DMA0 config
273 int "IRQ_MEM_DMA0"
/arch/blackfin/mach-bf518/
Ddma.c89 ret_irq = IRQ_MEM_DMA0; in channel2irq()
DKconfig273 config IRQ_MEM_DMA0 config
274 int "IRQ_MEM_DMA0"
/arch/blackfin/mach-bf533/include/mach/
Dirq.h35 #define IRQ_MEM_DMA0 BFIN_IRQ(21) /* DMA8/9 Interrupt (Memory DMA Stream 0) */ macro
/arch/blackfin/mach-bf561/
Ddma.c89 ret_irq = IRQ_MEM_DMA0; in channel2irq()
/arch/blackfin/mach-bf537/include/mach/
Dirq.h43 #define IRQ_MEM_DMA0 BFIN_IRQ(29) /* (Memory DMA Stream 0) */ macro
/arch/blackfin/mach-bf527/include/mach/
Dirq.h55 #define IRQ_MEM_DMA0 BFIN_IRQ(42) /* MDMA Stream 0 */ macro
/arch/blackfin/mach-bf518/include/mach/
Dirq.h57 #define IRQ_MEM_DMA0 BFIN_IRQ(42) /* MDMA Stream 0 */ macro
/arch/blackfin/mach-bf561/include/mach/
Dirq.h83 #define IRQ_MEM_DMA0 IRQ_DMA1_WRRD0 macro